There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality.

Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

I and i

Data Mining - Concepts and Techniques.

Diagnostic and Statistical Manual of Mental Disorders, 4th ed

: A given switching function of n variables can frequently be decomposed into a composite function of several essentially simpler switching functions. Such decompositions lead to designs of more economical switching circuits to realize the given switching function. Ashenhurst's chart method is generalized to nondisjunctive decompositions by means of the don't care conditions. This extension provides an effective method of constructing all decompositions of switching functions. (Author)

On the decomposition of switching functions

Physical limitations for CMOS technology have provided the way for manufacturing the quantum cellular automata technology-based hardware elements at Nano level. From the purpose of very high speed, area and low power consumption, this Nanotechnology has been taken into consideration. Improving their structures will lead promoting the system performance completely, because the Full adders are assumed as major and primary component of computational processors. In current study, the new layout of all single bit full adders in the quantum cellular automata's technology is introduced. In comparison with existing schemes, the suggested circuit has fewer cells and smaller area.

A new quantum-dot cellular automata full-adder

Novel high-performance ternary circuits for nanotechnology are presented here. Each of these carbon nanotube field-effect transistor (CNFET)-based circuits implements all the possible kinds of ternary logic, including negative, positive and standard ternary logics, in one structure. The proposed designs have good driving capability and large noise margins and are robust. These circuits are designed based on the unique properties of CNFETs, such as the capability of setting the desired threshold voltage by changing the diameters of the nanotubes. This property of CNFETs makes them very suitable for the multiple- V t design method. The proposed circuits are simulated exhaustively, using Synopsys HSPICE with 32 nm-CNFET technology in various test situations and different supply voltages. Simulation results demonstrate great improvements in terms of speed, power consumption and insusceptibility to process variations with respect to other conventional and state-of-the-art 32 nm complementary metal-oxide semiconductor and CNFET-based ternary circuits. For instance at 0.9 V, the proposed ternary logic and arithmetic circuits consume on average 53 and 40 less energy, respectively, compared to the CNFET-based ternary logic and arithmetic circuits, recently proposed in the literature.

Design of energy-efficient and robust ternary circuits for nanotechnology

Science and Research Branch of IAU, Tehran, IranQuantum-dot Cellular Automata (QCA) is one of the most attractive technologies for computing atnano-scale. The principle logic element in QCA is majority gate. In this paper, a novel design for5-input majority gate is presented. A 5-input majority gate study has been proposed; however thisstudy has changed the scheme of basic QCA cells. The new proposed device reduces cell countsand area and uses conventional form of QCA cells. Accuracy of this design is proven by applyingsome simple physical substantiation and QCADesigner tool is used for verifying majority circuitlayout and functionality. Furthermore, a QCA Full-Adder is constructed using the new proposeddesign. Simulation results demonstrate that the proposed design of majority gates and Full-Adderresulted in signiﬁcant improvements in designing logical circuits.

Five-Input Majority Gate, a New Device for Quantum-Dot Cellular Automata

This paper proposes two reversible logic gates, HNFG and HNG. The first gate HNFG can be used as two Feynman Gates. It is suitable for a single copy of two bits with no garbage outputs. It can be used as &#34Copying Circuit&#34 to increase fan-out because fan-out is not allowed in reversible circuits. The second gate HNG can implement all Boolean functions. It also can be used to design optimized adder architectures. This paper also proposes a novel reversible full adder. One of the prominent functionalities of the proposed HNG gate is that it can work singly as a reversible full adder unit. The proposed reversible full adder contains only one gate. We show that its hardware complexity is less than the existing reversible full adders. The proposed full adder is then applied to the design of a reversible 4-bit parallel adder. A reversible Binary Coded Decimal (BCD) adder circuit is also proposed. The proposed circuit can add two 4-bit binary variables and it transforms the result into the appropriate BCD number using efficient error correction modules. We show that the proposed reversible BCD adder has lower hardware complexity and it is much better and optimized in terms of number of reversible gates and garbage outputs with compared to the existing counterparts.

Keivan Navi

Papers

A new quantum-dot cellular automata full-adder

Design of energy-efficient and robust ternary circuits for nanotechnology

Five-Input Majority Gate, a New Device for Quantum-Dot Cellular Automata

A Novel Reversible BCD Adder For Nanotechnology Based Systems

Novel Robust Single Layer Wire Crossing Approach for Exclusive OR Sum of Products Logic Design with Quantum-Dot Cellular Automata