Satoshi Inaba

TL;DR: A semiconductor projection is formed on a semiconductor substrate of the first conductivity type as discussed by the authors, and a gate electrode is formed above at least the side surfaces of the projected semiconductor.

TL;DR: In this article, the leakage current can be reduced while improving a drain breakdown voltage of an Insulated-Gate transistor such as a MOSFET, MOSSIT and a MISFET.

Abstract: A semiconductor device according to an aspect of the invention comprises an n-type FinFET which is provided on a semiconductor substrate and which includes a first fin, a first gate electrode crossing a channel region of the first fin via a gate insulating film in three dimensions, and contact regions provided at both end of the first fin, a p-type FinFET which is provided on the semiconductor substrate and which includes a second fin, a second gate electrode crossing a channel region of the second fin via a gate insulating film in three dimensions, and contact regions provided at both end of the second fin, wherein the n- and the p-type FinFET constitute an inverter circuit, and the fin width of the contact region of the p-type FinFET is greater than the fin width of the channel region of the n-type FinFET.

TL;DR: In this article, a CMOS FinFET fabricated on bulk Si substrate is discussed from the viewpoint of device size scalability and short channel effect control, and a trimming technique by special oxidation was applied to reduce fin width down to sub-10 nm regime.

TL;DR: In this article, a DS-Schottky S/D CMOS-FinFET with dopant-segregated Schottky source/drain was demonstrated.