S
Seda Ogrenci-Memik
Researcher at Northwestern University
Publications - 26
Citations - 360
Seda Ogrenci-Memik is an academic researcher from Northwestern University. The author has contributed to research in topics: Content-addressable memory & Pattern recognition (psychology). The author has an hindex of 8, co-authored 26 publications receiving 252 citations.
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Journal ArticleDOI
Machine Learning-Based Temperature Prediction for Runtime Thermal Management Across System Components
Kaicheng Zhang,Akhil Guliani,Seda Ogrenci-Memik,Gokhan Memik,Kazutomo Yoshii,Rajesh Sankaran,Pete Beckman +6 more
TL;DR: This paper presents a framework for creating a lightweight thermal prediction system suitable for run-time management decisions, and develops alternative methods using neural network and linear regression-based methods to perform a comprehensive comparative study of prediction methods.
Proceedings ArticleDOI
User-specific skin temperature-aware DVFS for smartphones
TL;DR: This work presents a method for estimating skin and screen temperature at run-time using a combination of available on-device thermal sensors and performance indicators, and develops User-specific Skin Temperature-Aware (USTA) DVFS mechanism to control the skin temperature.
Journal ArticleDOI
A Reconfigurable Neural Network ASIC for Detector Front-End Data Compression at the HL-LHC
Giuseppe Di Guglielmo,Farah Fahim,Christian Herwig,Manuel Blanco Valentin,Javier Duarte,Cristian V. Gingu,Philip Harris,J. Hirschauer,Martin Kwok,Vladimir Loncar,Yingyi Luo,Llovizna Miranda,Jennifer Ngadiuba,D. Noonan,Seda Ogrenci-Memik,Maurizio Pierini,Sioni Summers,Nhan Tran +17 more
TL;DR: It is demonstrated that a neural network autoencoder model can be implemented in a radiation tolerant ASIC to perform lossy data compression alleviating the data transmission problem while preserving critical information of the detector energy profile.
Proceedings ArticleDOI
b-HiVE: a bit-level history-based error model with value correlation for voltage-scaled integer and floating point units
Georgios Tziantzioulis,Ali Murat Gok,S. M. Faisal,Nikos Hardavellas,Seda Ogrenci-Memik,Srinivasan Parthasarathy +5 more
TL;DR: In this paper, a model for voltage-scaling-induced timing errors is proposed, b-HiVE, which incorporates history and correlation among outputs, and the variation in the error behavior at different bit locations.