An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

A method of fabricating a semiconductor structure including the steps of providing a silicon substrate (10) having a surface (12), forming on the surface (12) of the silicon substrate (10), by atomic layer deposition (ALD), a seed layer (20;20') characterised by a silicate material and forming, by atomic layer deposition (ALD) one or more layers of a high dielectric constant oxide (40) on the seed layer (20;20').

Method for fabricating a semiconductor structure including a metal oxide interface with silicon

An object is to provide a method for manufacturing a semiconductor device, in which the number of photolithography steps can be reduced, the manufacturing process can be simplified, and manufacturing can be performed with high yield at low cost A method for manufacturing a semiconductor device includes the following steps: forming a semiconductor film; irradiating a laser beam by passing the laser beam through a photomask including a shield for shielding the laser beam; subliming a region which has been irradiated with the laser beam through a region in which the shield is not formed in the photomask in the semiconductor film; forming an island-shaped semiconductor film in such a way that a region which is not irradiated with the laser beam is not sublimed because it is a region in which the shield is formed in the photomask; forming a first electrode which is one of a source electrode and a drain electrode and a second electrode which is the other one of the source electrode and the drain electrode; forming a gate insulating film; and forming a gate electrode over the gate insulating film

Method for Manufacturing Semiconductor Device

The anomalous leakage current I L in LPCVD polysilicon MOSFET's is attributed to field emission via grain-boundary traps in the (front) surface depletion region at the drain, and an analytic model that describes the strong dependences of I L on the gate and drain voltages is developed. The model predictions are consistent with measured current-voltage characteristics. Physical insight afforded by the model implies device design modifications to control and reduce I L , and indicates when the back-surface leakage component is significant.

Anomalous leakage current in LPCVD PolySilicon MOSFET's

Building on nearly two decades of reported results for MOSFET's fabricated in small-grain polycrystalline silicon, a design methodology is developed that yields devices which have low threshold voltage, high drive current, low leakage current, tight parameteric control, and reduced topology, while requiring no nonstandard materials, processes, and tools. Design criteria and device performance are discussed, grain boundary characterization techniques are described, technological issues pertinent to VLSI implementation are investigated, and long-term device reliability is studied. The potential applications of the polysilicon MOSFET's in high-density dRAM and sRAM are explored. The successful implementation of an experimental stacked CMOS 64K static RAM proves the utility of these devices for three-dimensional integration in a VLSI environment.

Characteristics and three-dimensional integration of MOSFET's in small-grain LPCVD polycrystalline Silicon

A single crystal and a polycrystal having an excellent crystal quality and providing a highly reliable semiconductor device are formed by solid phase growth at low temperatures. An amorphous thin film is deposited on a substrate such that an average inter-atomic distance of main constituent element of the amorphous thin film is 1.02 times or more of an average inter-atomic distance of the elements in single crystal, and crystallization energy is applied to the amorphous thin film to perform solid phase growth to thereby form a single crystal. In another embodiment of the present invention, an amorphous semiconductor thin film is formed on a substrate or an insulating film such that an average inter-atomic distance distribution of main constituent element of the film substantially coincides with an average inter-atomic distance distribution of the element in a single crystal, and crystallization energy is applied to the amorphous semiconductor thin film to cause solid phase growth to thereby form a single crystalline semiconductor thin film.

Semiconductor device and its fabricating method

The characterization of polycrystalline silicon MOS transistors and its film properties are studied, with special emphasis on the relationship between crystalline defects and carrier transport phenomena An increase in mobility with gate field in polycrystalline silicon MOS transistors and also with doping concentration in polycrystalline silicon films is observed These phenomena are interpreted as space charge scattering effects caused by a high density of dislocations in the films U-shaped drain current vs gate voltage curves are observed both in p-channel and n-channel polycrystalline silicon MOS transistors The anomalous drain current in the accumulation region is interpreted as junction breakdown at the drain edge caused by crystalline imperfections in the films

https://iopscience.iop.org/article/10.1143/JJAP.21.1472/pdf

Characterization of Polycrystalline Silicon MOS Transistors and Its Film Properties. I

A semiconductor device manufacturing method capable of proceeding semiconductor device manufacturing processes according to predetermined schedules or while correcting them without testpieces is provided. The method includes the steps of collecting actually observed data during at least one of plural steps, obtaining prediction data in at least one of plural steps by using an ab initio molecular dynamics process simulator or a molecular dynamics simulator, comparing and verifying the prediction data and the actually observed data sequentially at real time, and correcting and processing the plural manufacturing process factors sequentially at real time if a difference in significance is recognized between set values for the plural manufacturing process factors and the plural manufacturing process factors estimated from the actually observed data according to comparison and verification.

Semiconductor device manufacturing method, manufacturing apparatus, simulation method and simulator

A semiconductor device includes a monocrystalline silicon substrate, an insulating film consisting of a monocrystalline silicon oxide formed on the surface of the monocrystalline silicon substrate, and a conductive film formed on the insulating film. The monocrystalline silicon substrate has a (100) plane orientation, the insulating film essentially consists of β-cristobalite having a unit structure in a P4 1 2 1 2 structural expression in such a manner that every other silicon atoms of four silicon atoms aligned about a C-axis are arranged on two adjacent silicon atoms aligned in a 110! direction on an Si (100) plane, and that a plane including the C-axis of the β-cristobalite and the 110! direction is set perpendicular to the (100) plane.

Semiconductor device with monocrystalline gate insulating film

A simplified version of BOX isolation technology is described. The new process has been greatly simplified over the original BOX by introducing an additional non-critical masking step. The body effect observed in narrow channel devices is reduced in the new structure. The capacitance measurement on diffused junctions in BOX structure shows smaller contributions from diode perimeter as compared to LOCOS structure. Hot electron reliability of small geometry MOSFETs has been also studied and the results are presented and discussed.

http://ieeexplore.ieee.org/iel5/9949/31897/01483557.pdf

Shinji Onga

Papers

Semiconductor device and its fabricating method

Characterization of Polycrystalline Silicon MOS Transistors and Its Film Properties. I

Semiconductor device manufacturing method, manufacturing apparatus, simulation method and simulator

Semiconductor device with monocrystalline gate insulating film

A simplified box (buried-oxide) isolation technology for megabit dynamic memories