The assembly of individual two-dimensional materials into van der Waals heterostructures enables the construction of layered three-dimensional materials with desirable electronic and optical properties. A core problem in the fabrication of these structures is the formation of clean interfaces between the individual two-dimensional materials which would affect device performance. We present here a technique for the rapid batch fabrication of van der Waals heterostructures, demonstrated by the controlled production of 22 mono-, bi- and trilayer graphene stacks encapsulated in hexagonal boron nitride with close to 100% yield. For the monolayer devices, we found semiclassical mean-free paths up to 0.9 μm, with the narrowest samples showing clear indications of the transport being affected by boundary scattering. The presented method readily lends itself to fabrication of van der Waals heterostructures in both ambient and controlled atmospheres, while the ability to assemble pre-patterned layers paves the way for complex three-dimensional architectures.

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The hot pick-up technique for batch assembly of van der Waals heterostructures

The majority of microelectromechanical system (MEMS) devices must be combined with integrated circuits (ICs) for operation in larger electronic systems. While MEMS transducers sense or control phys ...

/pdf/integrating-mems-and-ics-3tx6wanytd.pdf

Integrating MEMS and ICs

We demonstrate humidity sensing using a change of electrical resistance of a single- layer chemical vapor deposited (CVD) graphene that is placed on top of a SiO2 layer on a Si wafer. To investigate the selectivity of the sensor towards the most common constituents in air, its signal response was characterized individually for water vapor (H2O), nitrogen (N2), oxygen (O2), and argon (Ar). In order to assess the humidity sensing effect for a range from 1% relative humidity (RH) to 96% RH, devices were characterized both in a vacuum chamber and in a humidity chamber at atmospheric pressure. The measured response and recovery times of the graphene humidity sensors are on the order of several hundred milliseconds. Density functional theory simulations are employed to further investigate the sensitivity of the graphene devices towards water vapor. Results from the interaction between the electrostatic dipole moment of the water and the impurity bands in the SiO2 substrate, which in turn leads to electrostatic doping of the graphene layer. The proposed graphene sensor provides rapid response direct electrical read out and is compatible with back end of the line (BEOL) integration on top of CMOS-based integrated circuits.

/pdf/resistive-graphene-humidity-sensors-with-rapid-and-direct-4bfkwdauga.pdf

Resistive Graphene Humidity Sensors with Rapid and Direct Electrical Readout

We demonstrate humidity sensing using a change of the electrical resistance of single-layer chemical vapor deposited (CVD) graphene that is placed on top of a SiO2 layer on a Si wafer. To investigate the selectivity of the sensor towards the most common constituents in air, its signal response was characterized individually for water vapor (H2O), nitrogen (N2), oxygen (O2), and argon (Ar). In order to assess the humidity sensing effect for a range from 1% relative humidity (RH) to 96% RH, the devices were characterized both in a vacuum chamber and in a humidity chamber at atmospheric pressure. The measured response and recovery times of the graphene humidity sensors are on the order of several hundred milliseconds. Density functional theory simulations are employed to further investigate the sensitivity of the graphene devices towards water vapor. The interaction between the electrostatic dipole moment of the water and the impurity bands in the SiO2 substrate leads to electrostatic doping of the graphene layer. The proposed graphene sensor provides rapid response direct electrical readout and is compatible with back end of the line (BEOL) integration on top of CMOS-based integrated circuits.

/pdf/resistive-graphene-humidity-sensors-with-rapid-and-direct-xthh4c6acs.pdf

Resistive graphene humidity sensors with rapid and direct electrical readout

Colloidal nanocrystals are nanometer-sized, solution-grown inorganic particles stabilized by a layer of surfactants attached to their surface. The inorganic cores exhibit useful properties controlled by composition as well as size and shape, while the surfactant coating ensures that these structures are easy to fabricate and process. It is this combination of features that makes colloidal nanocrystals attractive and promising building blocks for advanced materials and devices. But their full potential can only be exploited if we achieve exquisite control over their composition, size, shape, crystal structure and surface properties. Here we review what is known about nanocrystal growth and outline strategies for controlling it.

Colloidal nanocrystal synthesis and the organic-inorganic interface

The majority of microelectromechanical system (MEMS) devices must be combined with integrated circuits (ICs) for operation in larger electronic systems. While MEMS transducers sense or control physical, optical or chemical quantities, ICs typically provide functionalities related to the signals of these transducers, such as analog-to-digital conversion, amplification, filtering and information processing as well as communication between the MEMS transducer and the outside world. Thus, the vast majority of commercial MEMS products, such as accelerometers, gyroscopes and micro-mirror arrays, are integrated and packaged together with ICs. There are a variety of possible methods of integrating and packaging MEMS and IC components, and the technology of choice strongly depends on the device, the field of application and the commercial requirements. In this review paper, traditional as well as innovative and emerging approaches to MEMS and IC integration are reviewed. These include approaches based on the hybrid integration of multiple chips (multi-chip solutions) as well as system-on-chip solutions based on wafer-level monolithic integration and heterogeneous integration techniques. These are important technological building blocks for the More-Than-Moore paradigm described in the International Technology Roadmap for Semiconductors. In this paper, the various approaches are categorized in a coherent manner, their merits are discussed, and suitable application areas and implementations are critically investigated. The implications of the different MEMS and IC integration approaches for packaging, testing and final system costs are reviewed.

/pdf/integrating-mems-and-ics-5evxuk7ch7.pdf

In this paper, we demonstrate a novel manufacturing technology for high-aspect-ratio vertical interconnects for high-frequency applications This novel approach is based on magnetic self-assembly of prefabricated nickel wires that are subsequently insulated with a thermosetting polymer The high-frequency performance of the through silicon vias (TSVs) is enhanced by depositing a gold layer on the outer surface of the nickel wires and by reducing capacitive parasitics through a low- $k$ polymer liner As compared with conventional TSV designs, this novel concept offers a more compact design and a simpler, potentially more cost-effective manufacturing process Moreover, this fabrication concept is very versatile and adaptable to many different applications, such as interposer, micro electromechanical systems, or millimeter wave applications For evaluation purposes, coplanar waveguides with incorporated TSV interconnections were fabricated and characterized The experimental results reveal a high bandwidth from dc to 86 GHz and an insertion loss of $ dB per single TSV interconnection for frequencies up to 75 GHz

/pdf/high-aspect-ratio-through-silicon-vias-for-high-frequency-3am4rcdomw.pdf

High-Aspect-Ratio Through Silicon Vias for High-Frequency Application Fabricated by Magnetic Assembly of Gold-Coated Nickel Wires

Through-silicon via (TSV) technology enables 3D-integrated devices with higher performance and lower cost as compared to 2D-integrated systems. This is mainly due to smaller dimensions of the packa ...

/pdf/very-high-aspect-ratio-through-silicon-vias-tsvs-fabricated-26kpp92dn9.pdf

Very high aspect ratio through-silicon vias (TSVs) fabricated using automated magnetic assembly of nickel wires

The ability to manufacture a nanogap in between two electrodes has proven a powerful catalyst for scientific discoveries in nanoscience and molecular electronics A wide range of bottom-up and top-down methodologies are now available to fabricate nanogaps that are less than 10 nm wide However, most available techniques involve time-consuming serial processes that are not compatible with large-scale manufacturing of nanogap devices The scalable manufacturing of sub-10 nm gaps remains a great technological challenge that currently hinders both experimental nanoscience and the prospects for commercial exploitation of nanogap devices Here, available nanogap fabrication methodologies are reviewed and a detailed comparison of their merits is provided, with special focus on large-scale and reproducible manufacturing of nanogaps The most promising approaches that could achieve a breakthrough in research and commercial applications are identified Emerging scalable nanogap manufacturing methodologies will ultimately enable applications with high scientific and societal impact, including high-speed whole genome sequencing, electromechanical computing, and molecular electronics using nanogap electrodes

Simon J. Bleiker

Papers

Integrating MEMS and ICs

Integrating MEMS and ICs

High-Aspect-Ratio Through Silicon Vias for High-Frequency Application Fabricated by Magnetic Assembly of Gold-Coated Nickel Wires

Very high aspect ratio through-silicon vias (TSVs) fabricated using automated magnetic assembly of nickel wires

Scalable Manufacturing of Nanogaps