T
Takashi Taniguchi
Researcher at Panasonic
Publications - 8
Citations - 260
Takashi Taniguchi is an academic researcher from Panasonic. The author has contributed to research in topics: Signal & Adder. The author has an hindex of 7, co-authored 8 publications receiving 258 citations.
Papers
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Proceedings ArticleDOI
Design of high speed MOS multiplier and divider using redundant binary representation
TL;DR: This work improved the algorithm and the method of implementation, and designed an advanced multiplier and divider for MOS LSI based on a new algorithm that has several excellent features such as high speed addition operations.
Patent
Arithmetic processor and multiplier using redundant signed digit arithmetic
TL;DR: In this paper, an arithmetic processor and an addition/subtraction circuit therefor are disclosed, which comprises a plurality of the addition and subtraction units arranged in parallel, each unit being capable of carrying out addition (or subtraction) with respect to respective digits of two operands.
Patent
Method and apparatus for controlling a clock signal
TL;DR: In this article, the first and second blocks of a data processing device are selected and enabled in accordance with an instruction representing which of the first or second blocks should be selected, and a clock change signal is generated on the basis of the instruction.
Journal Article
High Speed MOS Multiplier and Divider Using Redundant Binary Representation and Their Implementation in a Microprocessor
Patent
Arithmetic processor using signed-digit representation of external operands
TL;DR: In this article, an arithmetic processor which represents internal arithmetic operands as signed-digit numbers, each digit of which may have either positive, zero, or negative values and which executes addition of a plurality of numbers each of whose most significant digit is offset with respect to the other numbers.