2.3. Medical Devices and Sensors 9 2.4. Radio Frequency Applications 10 3. Materials 12 3.1. Organic Electronics Materials 12 3.2. Semiconducting Polymer Design 13 3.3. Poly(3-alkylthiophenes) 14 3.4. Poly(thieno(3,2-b)thiophenes 15 3.5. Benchmark Polymer Semiconductors 15 3.6. High Performance Polymer Semiconductors 15 4. Device Stability 16 4.1. Bias Stress in Organic Transistors 17 4.1.1. Bias Stress Characterization 17 4.1.2. Bias Stress Mechanism 18 4.2. Short Channel Effects in Organic Transistors 19 5. Materials Patterning and Integration 20 6. Conclusions 22 7. Acknowledgments 22 8. References 22

Materials and applications for large area electronics: solution-based approaches.

An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

An object of the present invention is to decrease the resistance of a power supply line, to suppress a voltage drop in the power supply line, and to prevent defective display. A connection terminal portion includes a plurality of connection terminals. The plurality of connection terminals is provided with a plurality of connection pads which is part of the connection terminal. The plurality of connection pads includes a first connection pad and a second connection pad having a line width different from that of the first connection pad. Pitches between the plurality of connection pads are equal to each other.

Semiconductor device and display device

Structures, methods of manufacturing and methods of use of electrically programmable read only memories (EPROM) and flash electrically erasable and programmable read only memories (EEPROM) include split channel and other cell configurations. An arrangement of elements and cooperative processes of manufacture provide self-alignment of the elements. An intelligent programming technique allows each memory cell to store more than the usual one bit of information. An intelligent erase algorithm prolongs the useful life of the memory cells. Use of these various features provides a memory having a very high storage density and a long life, making it particularly useful as a solid state memory in place of magnetic disk storage devices in computer systems.

Highly compact EPROM and flash EEPROM devices

Spiro Compounds for Organic Optoelectronics

A flash-erase EEPROM cell which consists of a single floating gate transistor is described. The cell is based on self-aligned double polysilicon stacked gate structure without a select transistor. It is programmed and erased by hot electrons at the drain edge similar to a UV-EPROM, and by Fowler-Nordheim tunneling of electrons from the floating gate to the source, respectively. An asymmetry in source and drain regions is introduced to enable fast program/erase operation. In addition, an n+concentration in the source region is optimized to achieve reproducible erasure, which is indispensable to avoid over-erasing problem. The optimized cell enables an erasing time of less than one millisecond with 12. 5 V on the source, and a scatter of erased Vth is almost negligible. Endurance and data retention characteristics is also adequate for implementation in memory chips. The small cell area of 9.3µm2is accomplished in a 0.8µm technology.

A flash-erase EEPROM cell with an asymmetric source and drain structure

An electronic interpreter for interpreting sentences between a first person and a second person. The electronic interpreter includes a memory for storing sentence data in a data structure having a plurality of sets of sentences including translations of the sentences, wherein each sentence of each set of sentences is linked to another of the sets of sentences, and a data processing unit. The data processing unit retrieves a set of sentences from the memory in response to a keyword input from the first person using an input device, displays the set of sentences on a display, selects a sentence from the set of sentences in response to an input from the first person using the input device, displays a translation of the selected sentence on the display along with another set of sentences linked to the selected sentence, selects a sentence from the another set of sentences in response to an input from the second person using the input device, displays a translation of said selected sentence on the display along with another set of sentences linked to the selected sentence, and repeats all of the previous operations continually until a keyword has been input from the first person using the input device.

Electronic interpreter utilizing linked sets of sentences

Disclosed is an active-matrix addressed TFT substrate using a thin film transistor, a manufacturing method and an anodic oxidation method thereof, a liquid crystal display panel using the TFT substrate and a liquid crystal display equipment using the liquid crystal display panel. In the TFT substrate, Cr or Ta is used for gate terminals, aluminum or a metal mainly composed of aluminum is used for gate bus-lines extending therefrom, for gate electrodes, and for electrodes of thin film capacitors (additional capacitance, storage capacitance), and an anodic oxidized film composed of the metal and free from defect is used for at least one of gate insulators, dielectric films of the thin film capacitances and interlayer insulating films for the intersections between the bus-lines. Also disclosed is a method of selectively forming an anodic oxidized film on an aluminum pattern. That is, in a case of forming a selective oxidation mask to a desired region on the aluminum pattern with a positive type photoresist, in the present invention, an angle (θ) formed between the selective oxidation mask and the aluminum pattern is made as: θ≧110-20T (T: film thickness of the positive type photoresist).

Thin film transistor substrate, liquid crystal display panel and liquid crystal display equipment

A liquid crystal display panel and a method of 
driving the display panel are disclosed The display 
panel and the driving method can reduce the leakage of a 
gate driving voltage to a first pixel electrode (9) due to 
the parasitic capacitance of a thin field transistor (4), 
and can lessen an adverse effect of noise which is 
generated at a second pixel electrode by cancelling out 
the capacitive coupling to the first pixel electrode, on 
an image displayed by the display panel

Liquid crystal display device and method of driving the same

Instability mechanism of amorphous silicon‐silicon nitride thin‐film transistors (TFTs) is examined. By investigating double‐layer insulator TFTs, it is demonstrated that the instability is caused by an electrical charge stored at the interface between amorphous silicon and silicon nitride. The amount of stored charge at the interface (Q) does not depend on either drain voltage or drain current. Study on TFTs with several insulator thicknesses has shown that Q strongly depends on the band bending in the amorphous silicon that is related to the gate electric field (E) through the gate insulator. The Q‐E relationship is found to be a more general expression of the dependence of threshold voltage shift on gate voltage, and is incorporated into a formula suitable for examining the interface quality.

Toshihisa Tsukada

Papers

A flash-erase EEPROM cell with an asymmetric source and drain structure

Electronic interpreter utilizing linked sets of sentences

Thin film transistor substrate, liquid crystal display panel and liquid crystal display equipment

Liquid crystal display device and method of driving the same

Characterization of instability in amorphous silicon thin‐film transistors