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Woradorn Wattanapanitch
Researcher at Kasetsart University
Publications - 24
Citations - 913
Woradorn Wattanapanitch is an academic researcher from Kasetsart University. The author has contributed to research in topics: Amplifier & Operational amplifier. The author has an hindex of 8, co-authored 21 publications receiving 836 citations. Previous affiliations of Woradorn Wattanapanitch include Massachusetts Institute of Technology & Cornell University.
Papers
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Journal ArticleDOI
An Energy-Efficient Micropower Neural Recording Amplifier
TL;DR: The amplifier appears to be the lowest power and most energy-efficient neural recording amplifier reported to date and the low-noise design techniques that help the neural amplifier achieve input-referred noise that is near the theoretical limit of any amplifier using a differential pair as an input stage.
Journal ArticleDOI
A Low-Power 32-Channel Digitally Programmable Neural Recording Integrated Circuit
TL;DR: An ultra-low-power 32-channel neural-recording integrated circuit (chip) in a 0.18 μ m CMOS technology that achieves an ENOB of 7.65 and a net efficiency of 77 fJ/State, making it one of the most energy-efficient designs for neural recording applications.
Journal ArticleDOI
Low-Power Circuits for Brain–Machine Interfaces
Rahul Sarpeshkar,Woradorn Wattanapanitch,Scott K. Arfin,Benjamin I. Rapoport,Soumyajit Mandal,M.W. Baker,Michale S. Fee,Sam Musallam,Richard A. Andersen +8 more
TL;DR: This paper presents work on ultra-low-power circuits for brain–machine interfaces with applications for paralysis prosthetics, stroke, Parkinson's disease, epilepsy, prosthetics for the blind, and experimental neuroscience systems.
Proceedings ArticleDOI
Low-Power Circuits for Brain-Machine Interfaces
Rahul Sarpeshkar,Woradorn Wattanapanitch,Benjamin I. Rapoport,Scott K. Arfin,M.W. Baker,Soumyajit Mandal,Michale S. Fee,Sam Musallam,Richard A. Andersen +8 more
TL;DR: This paper presents work on ultra-low-power circuits for brain-machine interfaces with applications for paralysis prosthetics, prosthetics for the blind, and experimental neuroscience systems, including circuits for wireless stimulation of neurons.
Journal ArticleDOI
Efficient Universal Computing Architectures for Decoding Neural Activity
Benjamin I. Rapoport,Lorenzo Turicchia,Woradorn Wattanapanitch,Thomas J. Davidson,Rahul Sarpeshkar +4 more
TL;DR: A system of extremely low computational complexity, designed for real-time decoding of neural signals, and suited for highly scalable implantable systems that minimize size and power consumption, while maximizing the ability to compress data to be transmitted over limited-bandwidth wireless channels.