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Xiao Yu

Researcher at Chinese Academy of Sciences

Publications -  24
Citations -  144

Xiao Yu is an academic researcher from Chinese Academy of Sciences. The author has contributed to research in topics: Silicon & Etching (microfabrication). The author has an hindex of 5, co-authored 24 publications receiving 118 citations.

Papers
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Journal ArticleDOI

CMOS MEMS-based thermoelectric generator with an efficient heat dissipation path

TL;DR: In this article, a CMOS MEMS-based thermoelectric energy generator (TEG) with an efficient heat dissipation path is presented. But the performance of the TEG is limited by the high thermal contact resistance in the system.
Journal ArticleDOI

Top-down fabricated silicon-nanowire-based field-effect transistor device on a (111) silicon wafer.

TL;DR: The unique anisotropic wet-etching mechanism of a (111) silicon wafer facilitates the highly controllable top-down fabrication of silicon nanowires (SiNWs) with conventional microfabrication technology.
Journal ArticleDOI

Significant performance improvement for micro-thermoelectric energy generator based on system analysis

TL;DR: In this article, a high-performance micro-thermoelectric generator (μ-TEG) optimized based on a system analysis is presented, where the thermal matching requirement for thermocouples dimension and array density to maximize the output power is analyzed.
Patent

Method for preparing nano structure on surface of (111) silicon wafer

TL;DR: In this paper, a method for preparing a nano structure on a surface of a (111) silicon wafer, belonging to the technical field of nano, was described, in which a monocrystalline silicon nano wall structure or nano horn structure of which the characteristic dimension is on a nano level is prepared on the surface of the (1) silicon Wafer by utilizing the anisotropic wet-process corrosive characteristic of the silicon material, or a self-restricting oxidation technique is combined to further prepare a monoclastic silicon nanowire structure.
Patent

Method for preparing nanometer structures from top to bottom on surfaces of (110) type silicon chips

TL;DR: In this paper, a method for preparing nanometer structures from top to bottom on the surfaces of (110) type silicon chips, which belongs to the technical field of nanometer and is characterized in that the anisotropy wet process corrosion characteristics of silicon materials are used for preparing monocrystalline silicon nanometer wall structures or nanometer corner structures with the characteristic dimension being nanometer level.