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Xiao Zhang

Researcher at Google

Publications -  26
Citations -  1253

Xiao Zhang is an academic researcher from Google. The author has contributed to research in topics: Cache & Scheduling (computing). The author has an hindex of 14, co-authored 26 publications receiving 1162 citations. Previous affiliations of Xiao Zhang include VMware & University of Rochester.

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Proceedings ArticleDOI

CPI2: CPU performance isolation for shared compute clusters

TL;DR: CPI2, which uses cycles-per-instruction (CPI) data obtained by hardware performance counters to identify problems, select the likely perpetrators, and then optionally throttle them so that the victims can return to their expected behavior.
Proceedings ArticleDOI

Towards practical page coloring-based multicore cache management

TL;DR: This paper proposes a hot-page coloring approach enforcing coloring on only a small set of frequently accessed (or hot) pages for each process, and demonstrates that hot page identification and selective coloring can significantly alleviate the coloring-induced adverse effects in practice.
Proceedings ArticleDOI

Power containers: an OS facility for fine-grained power and energy management on multicore servers

TL;DR: A new operating system facility called "power containers" that accounts for and controls the power and energy usage of individual fine-grained requests in multicore servers and enables new multicore server management capabilities including fair power capping that only penalizes power-hungry requests, and energy-aware request distribution between heterogeneous servers.
Proceedings ArticleDOI

Optimizing Google's warehouse scale computers: The NUMA experience

TL;DR: This paper investigates the impact of non-uniform memory access (NUMA) for several Google's key web-service workloads in large-scale production WSCs and reveals surprising tradeoffs between optimizing for NUMA performance and reducing cache contention.
Proceedings Article

Hardware execution throttling for multi-core resource management

TL;DR: It is argued in this paper that execution throttling mechanisms can be an effective tool to support fair use of shared on-chip resources on multi-cores and have the advantage of providing fine-grained control with little software system change or undesirable side effect.