Showing papers by "Yan-Fei Liu published in 2008"

An Optimal Control Method for Buck ConvertersUsing a Practical Capacitor ChargeBalance Technique

Abstract: A novel control method is presented in this paper which utilizes the concept of capacitor charge balance to achieve optimal dynamic response for buck converters undergoing a rapid load change. The proposed charge balance method is implemented with analog components and is cheaper and more effective than its digital counterparts since complex arithmetic and sampling delay is eliminated. The proposed controller will consistently cause the buck converter to recover from an arbitrary load transient with the smallest possible voltage deviation in the shortest possible settling time. Since the controller is nonlinear during transient conditions, it is not limited by bandwidth/switching frequency. Unlike conventional linear controllers, the dynamic response (voltage deviation, settling time) of the proposed controller can be estimated using a set of equations. This greatly simplifies the design process of the output filter. Simulation and experimental results show the functionality of the controller and demonstrate the superior dynamic response over that of a conventional linear controller.

A Current Source Gate Driver Achieving Switching Loss Savings and Gate Energy Recovery at 1-MHz

Abstract: In this paper, a new current source gate drive circuit is proposed for power MOSFETs. The proposed circuit achieves quick turn on and turn off transition times to reduce switching loss and conduction loss in power MOSFETs. In addition, it can recover a portion of the CV gate energy normally dissipated in a conventional driver. The circuit consists of four controlled switches and a small inductor (typically 100 nH or less). The current through the inductor is discontinuous in order to minimize circulating current conduction loss. This also allows the driver to operate effectively over a wide range of duty cycles with constant peak current-a significant advantage for many applications since turn on and turn off times do not vary with the operating point. Experimental results are presented for the proposed driver operating in a boost converter at 1 MHz, 5 V input, 10 V/5 A output. At 5 V gate drive, a 2.9% efficiency improvement is achieved representing a loss savings of 24.8% in comparison to a conventional driver.

A New Resonant Gate-Drive Circuit With Efficient Energy Recovery and Low Conduction Loss

Abstract: In this paper, a new resonant gate-drive circuit is proposed to recover a portion of the power-MOSFET-gate energy that is typically dissipated in high-frequency converters. The proposed circuit consists of four control switches and a small resonant inductance. The current through the resonant inductance is discontinuous in order to minimize circulating-current conduction loss that is present in other methods. The proposed circuit also achieves quick turn-on and turn-off transition times to reduce switching and conduction losses in power MOSFETs. An analysis, a design procedure, and experimental results are presented for the proposed circuit. Experimental results demonstrate that the proposed driver can recover 51% of the gate energy at 5-V gate-drive voltage.

Optimal Design of Resonant Gate Driver for Buck Converter Based on a New Analytical Loss Model

Abstract: In this paper, the advantages of a new resonant driver are verified thoroughly by the analytical analysis, simulation and experimental results. A new accurate analytical loss model of the power metal oxide semiconductor field effect transistor driven by a current-source resonant gate driver is developed. Closed-formed analytical equations are derived to investigate the switching characteristics due to the parasitic inductance. The modeling and simulation results prove that compared to a voltage driver, a current-source resonant driver significantly reduces the propagation impact of the common source inductance during the switching transition at high (>1 MHz) switching frequency, which leads to a significant reduction of the switching transition time and the switching loss. Based on the proposed loss model, a general method to optimize the new resonant driver is proposed and employed in the development of a 12 V synchronous buck voltage regulator (VR) prototype at 1 MHz switching frequency. The level-shift circuit and digital implementation of complex programmable logic device (CPLD) are also presented. The analytical modeling matches the simulation results and experimental results well. Through the optimal design, a significant efficiency improvement is achieved. At 1.5 V output, the resonant driver improves the VR efficiency from 82.7% using a conventional driver to 86.6% at 20 A, and from 76.9% using a conventional driver to 83.6% at 30 A. More importantly, compared with other state of the art VR approaches, the new resonant driver is promising from the standpoints of both performance and cost-effectiveness.

A 1-MHz High-Efficiency 12-V Buck Voltage Regulator With a New Current-Source Gate Driver

Abstract: This paper proposes a new current-source gate drive circuit for a synchronous buck converter. The proposed driver can drive two MOSFETs independently with different drive currents for optimal design. For the control MOSFET, the optimal design involves a tradeoff between switching loss reduction and drive circuit loss; while for the synchronous-rectifier MOSFET, the optimal design involves a tradeoff between body diode conduction loss and drive circuit loss. Furthermore, the new drive circuit can achieve: 1) significant switching loss reduction; 2) gate energy recovery and high gate drive voltage to reduce R DS(ON) conduction losses; 3) reduced conduction loss and reverse recovery loss of the body diode; and 4) zero-voltage switching of all the drive switches. The improved driver using integrated inductors is presented with multiphase buck voltage regulators (VRs) to reduce the number of magnetic cores and the core loss. The experimental results prove that a significant efficiency improvement has been achieved. At 1.5-V output, the new driver improves the efficiency from 84% using a conventional driver to 87.3% at 20 A, and at 30 A, from 79.4% to 82.8%. Overall, the new driver approach is attractive from the standpoints of both performance and cost-effectiveness.

A New Dual-Channel Resonant Gate Drive Circuit for Low Gate Drive Loss and Low Switching Loss

Abstract: At high-frequency applications, the gate drive loss of the power metal oxide semiconductor field-effect transistor (MOSFET) becomes quite significant. A new dual-channel low side resonant gate drive circuit is proposed in this paper. The proposed drive circuit can provide two symmetrical drive signals for driving two MOSFETs. It charges and discharges the MOSFET gate capacitor with a constant current source. Both gate drive loss and, more importantly, switching loss can be reduced significantly. The proposed resonant gate drive circuit can be used to drive the synchronous MOSFETs in a current doubler or full-wave rectifier configuration. It can also be used to drive the primary MOSFETs in push-pull converters. Analysis, computer simulation, and experimental results show that significant power loss reduction is achieved by the proposed circuit.

A Practical Transformer Core Loss Measurement Scheme for High-Frequency Power Converter

Abstract: A practical method to measure transformer core loss in a high-frequency switching mode power converter is proposed. The method is also applicable when the transformer has dc bias in the magnetizing current. Practical issues to minimize the measurement error are discussed. The measurement results are very close to simulation results obtained from a time-domain finite element analysis solver. Detailed error analysis for the proposed method provides useful guidelines on transformer core loss measurement for switching mode power supplies.

DC-DC converter with improved dynamic response

Abstract: The invention relates to a control method and a controller for a DC-DC converter, such as a synchronous Buck converter, which exploits the principle of capacitor charge balance to allow the converter to recover from a positive and/or negative load current step in the shortest achievable time, with the lowest possible voltage undershoot/overshoot. The control method may be implemented by either an analog or a digital circuit. The controller may be integrated with existing controller schemes (such as voltage-mode controllers) to provide superior dynamic performance during large-signal transient conditions while providing stable operation during steady state conditions. The invention also relates to a method and a modification of a DC-DC converter topology that comprises connecting a controlled current source between an input terminal and an output terminal of the DC-DC converter; detecting a load current step to a new load current; modifying a duty cycle of the DC-DC converter; and modifying current through a parallel output capacitor of the DC-DC converter by controlling current of the current source. The methods and circuits provided herein are applicable to Buck converters and Buck-derived converters such as forward, push-pull, half-bridge, and full-bridge converters.

A Novel Non-Isolated Full Bridge Topology for VRM Applications

Abstract: In this paper, a new non-isolated full bridge (NFB) topology is introduced to solve the narrow duty cycle and hard switching problems of the buck converter in low output voltage, high output current applications. In comparison to the Buck converter, it operates at a significantly wider duty cycle and can achieve zero voltage switching for the high side MOSFETs. The NFB significantly reduces the input peak current and transfers a portion of the primary side energy directly to the load thereby reducing the stress on the synchronous rectifiers and filter inductors. Using self-driven synchronous rectifiers, the body diode conduction loss is reduced since no dead time is required between the primary side MOSFETs and the synchronous rectifiers. Given these significant advantages, the NFB can achieve higher efficiency than a two and three phase interleaved buck at the same power level. The efficiency gain enables the NFB to operate at a high switching frequency thereby enabling smaller output inductors to be used to achieve improved dynamic performance. Experimental results and analysis demonstrate that the new NFB can significantly improve the performance of a voltage regulator. The prototype built operated at 500 kHz, 12 V input, 1 V output, up to 30 A load and achieved an efficiency of 84.4% at 30 A load. A 1 MHz prototype achieved a full load efficiency of 82.1%. In comparison, the efficiency of a two and three phase Buck prototype was 79.7% and 82.6% at 30 A load and at 500kHz switching frequency.

A simple analytical switching loss model for buck voltage regulators

Abstract: In this paper, a simple and accurate analytical switching loss model is proposed for high frequency synchronous buck voltage regulators. The proposed model uses simple equations to calculate the rise and fall times and uses piecewise linear approximations of the high side MOSFET voltage and current waveforms to allow quick and accurate calculation of switching loss in a synchronous buck voltage regulator. Effects of the common source inductance and other circuit parasitic inductances are included. Spice simulations are used to demonstrate the accuracy of the voltage source driver model operating in a 1 MHz synchronous buck voltage regulator at 12 V input, 1.3 V output. Switching loss was estimated with the proposed model and measured with Spice for load current ranging from 10-30 A, common source inductance ranging from 250-1000 pH, voltage driver supply ranging from 6-12 V.

A practical minimum time control method for Buck converters based on capacitor charge balance

Abstract: A control method is presented in this paper which utilizes the concept of capacitor charge balance to achieve optimal dynamic response for Buck converters undergoing a rapid load change. The proposed charge balance method is implemented with analog components and is cheaper and more effective than its digital counterparts since complex arithmetic and sampling delay is eliminated. The proposed controller will consistently cause the Buck converter to recover from an arbitrary load transient with the smallest possible voltage deviation in the shortest possible settling time. Since the controller is non-linear during transient conditions, it is not limited by bandwidth/switching frequency. Unlike conventional linear controllers, the dynamic response (voltage deviation, settling time) of the proposed controller can be accurately predicted using a set of equations. This greatly simplifies the design process of the output filter. Simulation and experimental results show the functionality of the controller and demonstrate the superior dynamic response over that of a conventional linear controller.

A novel non-isolated ZVS asymmetrical buck converter for 12 V voltage regulators

Abstract: This paper presents a new non-isolated asymmetrical buck converter. The transformer is used to extend the extremely low duty-cycle of a conventional buck converter. The turn-off loss can be significantly reduced due to the extension of duty-cycle and there is no turn-on loss owing to zero-voltage turn-on condition. At the same time, the voltage stress over the synchronous rectifier (SR) MOSFETs is also reduced. Therefore, the reverse recovery losses of the body diode can also be reduced. Furthermore, MOSFETs with the lower voltage rating and lower Rds(on) can be used to reduce the conduction loss further. To further reduce the turn-off loss above the switching frequency of 1MHz, current-source gate driver can be also applied to this topology. A prototype at switching frequency of 1MHz was implemented and the preliminary experimental results verify the functionality of the new circuit.

A simple switching loss model for buck voltage regulators with current source drive

Abstract: A review of switching loss mechanisms for synchronous buck voltage regulators is presented. Following the review, a new simple analytical switching loss model is proposed for voltage regulators with current source drive. The model includes the impact of common source inductance and parasitic inductance on switching loss. It uses simple equations to calculate the rise and fall times and piecewise linear approximations of the MOSFET voltage and current waveforms to allow quick and accurate calculation of switching loss. Spice is used to demonstrate the accuracy of the model operating in a 1MHz synchronous buck voltage regulator at 12V input, 1.3V output. Experimental results are presented to demonstrate the accuracy of the proposed model.

A Novel Two Phase Nonisolated Full Bridge With Shared Primary Switches

Abstract: In this paper, a new full bridge topology called the two-phase nonisolated full bridge (NFB) is introduced. The proposed two-phase NFB can handle the same power as two parallel NFB converters, but with less MOSFETs, better efficiency, and lower cost. To demonstrate the advantages of the new topology, two prototypes are built on a 12-layer 2-oz PCB board, one with four inductors, the other with three inductors. Two prototypes achieve 82.3% and 82% efficiency at 1-MHz full load (1 V/80 A), respectively. This is compared to 81.8% efficiency of the two paralleled NFB converters. At light load (1 V/10 A), a 4% efficiency improvement is achieved. Experimental results demonstrate that compared with two paralleled NFB converters, the two-phase NFB converter is able to achieve better efficiency with a simplified power train circuit and reduced cost.

A new current-source gate driver for a buck voltage regulator

Abstract: A new current-source gate drive circuit is proposed for a synchronous buck voltage regulator (VR). The proposed driver can drive two MOSFETs independently with different drive currents for optimal design. Furthermore, the new drive circuit can achieve 1) significant switching loss reduction; 2) gate energy recovery; 3) reduced body diode losses and reverse recovery losses; 4) ZVS of all the drive switches. The improved driver using integrated inductors is also presented for a buck VR to reduce the number of magnetic cores and the core loss. The experimental results prove that a significant efficiency improvement has been achieved. At 1.5V output, the new driver improves the efficiency from 84% using a conventional driver to 87.3% (an improvement of 3.3%) at 20 A, and at 30 A, from 79.4% to 82.8% (an improvement of 3.4%). Overall, the new driver approach is very attractive from the standpoints of both performance and cost-effectiveness.

Modeling and simulation of Parallel Current Mode controlled boost converter

Abstract: In this paper, Parallel Current Mode Control method for Boost DC-DC converter is proposed. The parallel current mode control strategy is composed of two parallel terms: one is voltage term, the other is current term. They are calculated based on the input voltage, reference output voltage, inductor current and reference inductor current. The Parallel Current Mode Control method essentially distinguishes itself from the conventional current mode control method with two regulators, one for voltage regulation and the other for current regulation. Under the conventional Voltage Mode Control method and the new control method, small-signal models of Boost DC-DC converter are derived. The simulation result (based on the transfer functions) using Matlab/Simulink is compared with the simulation result based on the circuit simulation model, using PSIM. Results both in Matlab/Simulink environment and in PSIM environment are in good agreement, confirming the validity of the small-signal model. Both the small-signal analysis and simulation results demonstrate that Parallel Current Mode Control has superior performance as compared with Voltage Mode Control.

A new hybrid gate drive scheme for high frequency buck voltage regulators

Abstract: This paper presents a new hybrid drive scheme for a synchronous buck voltage regulator (VR). The proposed current-source driver is used to drive the control MOSFET to achieve fast switching speed and reduce the switching loss significantly due to the parasitic inductance in addition to gate energy recovery. Conventional voltage driver is used for synchronous rectifier (SR) MOSFET for its simplicity and good immunity and alleviation of dv/dt effect. The experimental results prove the advantages of the new drive scheme and a significant efficiency improvement has been achieved. At 1.3 V output, the new driver improves the efficiency from 82.8% using a conventional driver to 85.6% (an improvement of 2.8%) at 20 A, and at 25 A, from 80.5% to 83.0% (an improvement of 2.5%). The new drive can also be integrated into a standard drive integrated circuit (IC) and replace the conventional voltage drive IC directly. Overall, the new driver scheme is very promising from the standpoints of both performance and cost- effectiveness.

Power-Quality Improvement Using Wiener Filters Based On a Modular Compensating Strategy

Abstract: This paper introduces a new modeless modular compensating strategy to extract and mitigate power-quality (PQ) disturbances. The main advantage of this strategy is that it does not require any model or state-space formulation to extract the disturbances, such as the other commonly used state-space techniques. In addition, it is very simple for practical implementation compared to the time-domain and frequency-domain methods. The proposed strategy depends on recursive implementation of the Wiener filtering theory. The suggested strategy is validated by digital simulation results on the most common stationary and transient PQ problems.

A novel Non-Isolated Two-Phase Full Bridge topology for VRM applications

Abstract: In this paper a new full bridge topology called the two-phase non-isolated full bridge (NFB) is introduced. The proposed two-phase NFB can handle the same power as two parallel one-phase NFBs, but with less MOSFETs, better efficiency and lower cost. To demonstrate the advantages of the new topology, two prototypes are built on a 12 layer 2 oz PCB board, one with four inductors, the other with three inductors. Two prototypes achieve 82.3% & 82% efficiency at 1 MHz full load (1V/80A) respectively. This is compared to 81.8% efficiency of the two paralleled one-phase NFBs. At light load (1V/10A), a 4% efficiency improvement is achieved. Experimental results demonstrate that compared with two paralleled one-phase NFBs the two-phase NFB is able to achieve better efficiency with a simplified power train circuit and reduced cost.

Dual channel current-source gate drivers for high-frequency dc-dc converters

Abstract: In this paper, resonant gate driver techniques for power MOSFETs are reviewed at first. To solve the exiting problems of the drive circuits previously proposed, new dual channel current-source gate drivers are presented here. The new drive circuits can achieve quick turn-on and turn-off transition time to reduce the switching loss of power MOSFETs significantly by constant gate drive currents due to the parasitic inductance, especially the common source inductance. A 12 V synchronous buck VR prototype at 1 MHz switching frequency was built to demonstrate the advantages of the new drive circuits. A significant efficiency improvement over the conventional gate voltage driver is achieved.

Research and simulation of parallel current-mode controlled buck converter

Abstract: This paper introduces parallel current-mode control algorithm for DC-DC converters. The remarkable advantage of this new control is that it is derived directly in a discrete form and optimized for digital implementation. The duty cycle consists of two terms: voltage term and current term. They are calculated directly by the reference current, sensed inductor current, input voltage and output voltage, and only need three additions and two multiplications. Due to this, the algorithm is simple for digital implementation. At the same time, the proposed control method can also obtain good dynamic performance under load and input voltage variations. The assumptions are verified by simulations on synchronous buck converter for this new strategy using PSIM. Meanwhile, conventional peak current-mode control is presented and simulated as comparison. The proposed method can be applied to other topology such as boost, Buck-Boost, etc.

Controlled current source circuit (CCSC) for Reduction of output voltage overshoot in Buck converters

Abstract: In this paper, an auxiliary circuit is presented to improve the dynamic response of a buck converter. Since it is well established that for typical voltage regulator applications, voltage overshoots (due to step-down load transients) are much larger than voltage undershoots (due to step-up load transients), the goal of the proposed method is to reduce the former. The circuit only functions during step-down load transients and operates by rapidly transferring excess load current from the output of the buck converter to its input. Unlike previous unloading auxiliary circuits, the proposed method uses a controlled current source circuit (CCSC) to remove a constant regulated current from the output. The CCSC has the following advantages over previous circuits: a) predictable behavior allowing for simplified design, b) inherent over-current protection, c) low peak current to average current ratio allowing for use of smaller components. Through selection of the auxiliary current, it is possible to obtain a balanced overshoot/undershoot response for a buck converter, significantly reducing the required output capacitance. In this paper, it is shown through analysis, simulation and experimental results that for a modest increase in component cost, a large reduction of voltage overshoot and output capacitor requirement can be realized.

Chopper-cycloconverters for energy saving in motor control

Abstract: This paper proposes chopper-cycloconverters with simplest topologies, minimum devices and simple control modes for energy saving in motor systems. Typical waveforms and control regulations are presented. Passive freewheeling unit is introduced for reduce active device and simplifying the control method. Theoretical and simulation analyses show the significance in auxiliary small size applications for higher power factor operation than that of the traditional cycloconverters. The total power consumptions of them should be emphasized adequately in today's lacking of energy.

A novel isolated two-phase full bridge topology for VRM applications

Abstract: In this paper a new isolated full bridge is proposed. Compared with conventional full bridge the new topology can double the output power since its primary side and secondary side operate like two conventional full bridges in parallel and phase shift from each other. But it saves two switches at primary side and it achieves better efficiency. To demonstrate the advantages of the new topology two 48 V input, 1V/70 A output, 1 MHz, power module were built on a 12 layers, 2 oz copper PCB, one with four output inductors, the other with three output inductors. 81.3% &80.8% efficiency are achieved respectively at full load (1 V/70 A) compared with two paralleled FB 80.4% at full load (1 V/70 A) around 1% improvement is achieved. At light load (1 V/20 A), 4% improvement is achieved.