Y
Yasuhiro Sugimoto
Researcher at Chuo University
Publications - 112
Citations - 603
Yasuhiro Sugimoto is an academic researcher from Chuo University. The author has contributed to research in topics: CMOS & Transistor. The author has an hindex of 11, co-authored 110 publications receiving 588 citations. Previous affiliations of Yasuhiro Sugimoto include Toshiba.
Papers
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Patent
Level conversion circuit
TL;DR: In this article, a level conversion circuit consisting of an input terminal for applying a voltage signal of predetermined amplitude level, an output terminal for supplying a signal, the amplitude level of which is different from that of the voltage level corresponding to the signal applied to the input terminal, which is connected to the drain of the third MOS transistor.
Journal ArticleDOI
A 1.5-V current-mode CMOS sample-and-hold IC with 57-dB S/N at 20 MS/s and 54-dB S/N at 30 MS/s
TL;DR: In this article, a new video-speed current-mode CMOS sample-and-hold IC has been developed, which operates with a supply voltage as low as 1.5 V, a signal-to-noise ratio (S/N) of 57 dB and 54 dB with a 1-MHz input signal at clock frequencies of 20 and 30 MHz, and a power dissipation of 2.3 mW.
Patent
Sample-and-hold circuit and A/D converter
Satoru Miyabe,Yasuhiro Sugimoto +1 more
TL;DR: In this paper, a sample-and-hold circuit using a completely differential type operational amplifier circuit, to promote operational stability, to restrain a variation in a balance point of a middle value of differential output signals and to promote stability and accuracy of an A/D converter are achieved.
Patent
BICMOS logical circuits
Hiroyuki Hara,Yasuhiro Sugimoto +1 more
TL;DR: In this paper, the merits of the MOS transistors and the bipolar transistors can be demonstrated by the particular combination of the two different kinds of transistors in the logical circuit, thereby increasing the current driving performance while reducing power consumption without making the size of the logical NAND circuit large.
Proceedings ArticleDOI
The design of a 1 V, 1 GHz CMOS VCO circuit with in-phase and quadrature-phase outputs
Yasuhiro Sugimoto,T. Ueno +1 more
TL;DR: In this paper, a CMOS ring-oscillator type VCO circuit with inphase (I) and quadrature-phase (Q) outputs has been designed by using 0.6 /spl mu/m MOS devices.