An apparatus may include a semiconductor chip and a fluidics assembly. The semiconductor chip has an array of wells and an array of sensors and each sensor of the array of sensors is in fluid communication with a well of the array of wells. The fluidics assembly is located on top of the semiconductor chip and is configured to deliver fluids to the semiconductor chip. The fluidics assembly includes a flow expansion chamber configured to introduce the fluids, an outlet portion configured to pipe out the fluids, and a flow chamber portion. The flow chamber portion is configured to allow the fluids to flow from the flow expansion chamber to the outlet portion and to allow the fluids to interact along the way with material in the array of wells. The flow expansion chamber has a curved wall at the top or bottom so that the height of the flow expansion chamber at the center is less than at the walls that restrict the fluids to the left and right.

Methods and apparatus for measuring analytes using large scale fet arrays

A chemically sensitive sensor with a lightly doped region that affects an overlap capacitance between a gate and an electrode of the chemical sensitive sensor The lightly doped region extends beneath and adjacent to a gate region of the chemical sensitive sensor Modifying the gain of the chemically sensitive sensor is achieved by manipulating the lightly doped region under the electrodes

Chemically sensitive sensor with lightly doped drains

An ion-sensitive circuit can include a charge accumulation device, to accumulate a plurality of charge packets as a function of an ion concentration of a fluid, and at least one control and readout transistor, to generate an output signal as a function of the accumulated plurality of charge packets, the output signal representing the ion concentration of the solution. The charge accumulation device can include a first charge control electrode above a first electrode semiconductor region, an electrically floating gate structure above a gate semiconductor region and below an ion-sensitive passivation surface, a second charge control electrode above a second electrode semiconductor region, and a drain diffusion region. The first control electrode can control entry of charge into a gate semiconductor region in response to a first control signal. The ion-sensitive passivation surface can be configured to receive the fluid. The second charge control electrode can control transmission of the plurality of charge packets out of the gate semiconductor region and into the drain diffusion region in response to a second control signal. The drain diffusion region can receive the plurality of charge packets from the gate semiconductor region via the second electrode semiconductor region.

Ion-sensing charge-accumulation circuits and methods

The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a substrate, a transistor structure having a treated layer adjacent to the channel region, an isolation layer, and a dielectric layer in an opening of the isolation layer on the treated layer. The dielectric layer and the treated layer are disposed on opposite side of the transistor from a gate structure. The treated layer may be a lightly doped channel layer or a depleted layer.

Backside sensing bioFET with enhanced performance

The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device may include a substrate; a gate structure disposed on a first surface of the substrate and an interface layer formed on the second surface of the substrate. The interface layer may allow for a receptor to be placed on the interface layer to detect the presence of a biomolecule or bio-entity.

CMOS compatible BioFET

The present disclosure provides a bio-field effect transistor (BioFET) device and methods of fabricating a BioFET and a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a gate structure disposed on a first surface of a substrate and an interface layer formed on a second surface of the substrate. The substrate is thinned from the second surface to expose a channel region before forming the interface layer.

Backside CMOS compatible bioFET with no plasma induced damage

The present disclosure provides a biological field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a plurality of microwells having a bio-sensing layer and a number of stacked well portions over a multi-layer interconnect (MLI). A bottom surface area of a well portion is different from a top surface area of a well portion directly below. The microwells are formed by removing a top metal plate on a topmost level of the MLI.

Biosensing well array by self-alignment and selective etching

The present disclosure provides a biological field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a plurality of micro wells having a sensing gate bottom and a number of stacked well portions. A bottom surface area of a well portion is different from a top surface area of a well portion directly below. The micro wells are formed by multiple etching operations through different materials, including a sacrificial plug, to expose the sensing gate without plasma induced damage.

Direct sensing bioFETs and methods of manufacture

A device is provided which includes a transparent substrate. An opaque layer is disposed on the transparent substrate. A conductive layer disposed on the opaque layer. The opaque layer and the conductive layer form a handling layer, which may be used to detect and/or align the transparent wafer during fabrication processes. In an embodiment, the conductive layer includes a highly-doped silicon layer. In an embodiment, the opaque layer includes a metal. In embodiment, the device may include a MEMs device.

Handling layer for transparent substrate

Provided are direct sensing BioFET and methods of manufacture. The present disclosure provides a biological field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a plurality of micro wells having a sensing gate bottom and a number of stacked well portions. A bottom surface area of a well portion is different from a top surface area of a well portion directly below. The micro wells are formed by multiple etching operations through different materials, including a sacrificial plug, to expose the sensing gate without plasma induced damage.

Yi-Hsien Chang

Papers

Backside CMOS compatible bioFET with no plasma induced damage

Biosensing well array by self-alignment and selective etching

Direct sensing bioFETs and methods of manufacture

Handling layer for transparent substrate

Direct sensing BioFET and methods of manufacture