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Yung-Chen Lin
Researcher at University of California, Los Angeles
Publications - 40
Citations - 3313
Yung-Chen Lin is an academic researcher from University of California, Los Angeles. The author has contributed to research in topics: Nanowire & Electron mobility. The author has an hindex of 20, co-authored 39 publications receiving 3105 citations. Previous affiliations of Yung-Chen Lin include Applied Materials & National Tsing Hua University.
Papers
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Journal ArticleDOI
High-speed graphene transistors with a self-aligned nanowire gate
Lei Liao,Yung-Chen Lin,Mingqiang Bao,Rui Cheng,Jingwei Bai,Yuan Liu,Yongquan Qu,Kang L. Wang,Yu Huang,Xiangfeng Duan +9 more
TL;DR: On-chip microwave measurements demonstrate that the self-aligned graphene transistors have a high intrinsic cut-off (transit) frequency of fT = 100–300 GHz, with the extrinsic fT largely limited by parasitic pad capacitance.
Journal ArticleDOI
High-frequency self-aligned graphene transistors with transferred gate stacks.
Rui Cheng,Jingwei Bai,Lei Liao,Hailong Zhou,Yu Chen,Lixin Liu,Yung-Chen Lin,Shan Jiang,Yu Huang,Xiangfeng Duan +9 more
TL;DR: This study defines a unique pathway to large-scale fabrication of high-performance graphene transistors, and holds significant potential for future application of graphene-based devices in ultra–high-frequency circuits.
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High-κ oxide nanoribbons as gate dielectrics for high mobility top-gated graphene transistors
TL;DR: It is shown that single crystalline Al2O3 nanoribbons can be synthesized with excellent dielectric properties and used as the gate dielectrics for top-gated graphene transistors with the highest carrier mobility reported to date, and a more than 10-fold increase in transconductance compared to the back- gated devices.
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Sub-100 nm Channel Length Graphene Transistors
TL;DR: Graphene transistors with 45-100 nm channel lengths have been fabricated with the scaled transconductance exceeding 2 mS/μm, comparable to the best performed high electron mobility transistor with similar channel lengths.
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Top-gated graphene nanoribbon transistors with ultrathin high-k dielectrics.
TL;DR: This method, for the first time, demonstrates the effective integration of ultrathin high-k dielectrics with graphene with precisely controlled thickness and quality, representing an important step toward high-performance graphene electronics.