An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

Various embodiments for improved power devices as well as their methods of manufacture, packaging and circuitry incorporating the same for use in a wide variety of power electronic applications are disclosed. One aspect of the invention combines a number of charge balancing techniques and other techniques for reducing parasitic capacitance to arrive at different embodiments for power devices with improved voltage performance, higher switching speed, and lower on-resistance. Another aspect of the invention provides improved termination structures for low, medium and high voltage devices. Improved methods of fabrication for power devices are provided according to other aspects of the invention. Improvements to specific processing steps, such as formation of trenches, formation of dielectric layers inside trenches, formation of mesa structures and processes for reducing substrate thickness, among others, are presented. According to another aspect of the invention, charge balanced power devices incorporate temperature and current sensing elements such as diodes on the same die. Other aspects of the invention improve equivalent series resistance (ESR) for power devices, incorporate additional circuitry on the same chip as the power device and provide improvements to the packaging of charge balanced power devices.

Power semiconductor devices and methods of manufacture

A power semiconductor device includes trenches disposed in a first base layer of a first conductivity type at intervals to partition main and dummy cells, at a position remote from a collector layer of a second conductivity type. In the main cell, a second base layer of the second conductivity type, and an emitter layer of the first conductivity type are disposed. In the dummy cell, a buffer layer of the second conductivity type is disposed. A gate electrode is disposed, through a gate insulating film, in a trench adjacent to the main cell. A buffer resistor having an infinitely large resistance value is inserted between the buffer layer and emitter electrode. The dummy cell is provided with an inhibiting structure to reduce carriers of the second conductivity type to flow to and accumulate in the buffer layer from the collector layer.

Power semiconductor device

In this paper, we discuss the impact of digital control in high-frequency switched-mode power supplies (SMPS), including point-of-load and isolated DC-DC converters, microprocessor power supplies, power-factor-correction rectifiers, electronic ballasts, etc., where switching frequencies are typically in the hundreds of kHz to MHz range, and where high efficiency, static and dynamic regulation, low size and weight, as well as low controller complexity and cost are very important. To meet these application requirements, a digital SMPS controller may include fast, small analog-to-digital converters, hardware-accelerated programmable compensators, programmable digital modulators with very fine time resolution, and a standard microcontroller core to perform programming, monitoring and other system interface tasks. Based on recent advances in circuit and control techniques, together with rapid advances in digital VLSI technology, we conclude that high-performance digital controller solutions are both feasible and practical, leading to much enhanced system integration and performance gains. Examples of experimentally demonstrated results are presented, together with pointers to areas of current and future research and development.

Impact of digital control in power electronics

An object is to provide a method for manufacturing a semiconductor device, in which the number of photolithography steps can be reduced, the manufacturing process can be simplified, and manufacturing can be performed with high yield at low cost A method for manufacturing a semiconductor device includes the following steps: forming a semiconductor film; irradiating a laser beam by passing the laser beam through a photomask including a shield for shielding the laser beam; subliming a region which has been irradiated with the laser beam through a region in which the shield is not formed in the photomask in the semiconductor film; forming an island-shaped semiconductor film in such a way that a region which is not irradiated with the laser beam is not sublimed because it is a region in which the shield is formed in the photomask; forming a first electrode which is one of a source electrode and a drain electrode and a second electrode which is the other one of the source electrode and the drain electrode; forming a gate insulating film; and forming a gate electrode over the gate insulating film

Method for Manufacturing Semiconductor Device

A high breakdown voltage semiconductor device comprising a semiconductor substrate an insulating layer formed on the semiconductor substrate, a high resistance semiconductor layer formed on the insulating layer, an isolation region formed in the high resistance semiconductor layer, an element region formed in the high resistance semiconductor layer isolated by the isolation region in a lateral direction, a first low resistance region of a first conductivity type formed in a central surface portion of the element region, and a second low resistance region of a second conductivity type formed in a peripheral surface portion of the element region. Dose of impurities in the element region is set such that a portion of the element region between the first low resistance region and the second low resistance region is completely depleted when voltage is applied between the first and second low resistance regions.

High-breakdown-voltage semiconductor device

The historical and technological development of the ubiquitous trench power MOSFET (or vertical trench VDMOS) is described. Overcoming the deficiencies of VMOS and planar VDMOS, trench VDMOS innovations include pioneering efforts in reactive ion etching and oxidation of the silicon trench gate, polysilicon fill and recessed etchback, unit cell and distributed voltage clamping to protect the trench gate, and scaling active cells to high densities using deep submicron fabrication. Thereafter, gate–drain engineered trench VDMOS improved high-frequency switching capability with lower gate charge utilizing nonuniform gate oxides, field shaping, and charge balancing (superjunction, RSO) methods. The recent adaptation of trench gates in wide bandgap unipolar devices is also described.

The Trench Power MOSFET: Part I—History, Technology, and Prospects

A plurality of trenches are formed in a drift region between a p-type body region and an-type buffer region. A silicon oxide film is formed on the side and bottom of each of the trenches, and an SIPOS film is buried into each of the trenches. The trenches are formed by RIE, and the SIPOS film is deposited by LPCVD and an undesired portion can be removed by dry etching such as RIE. The SIPOS film is connected to a source electrode at the source end of each trench, and it is connected to a drain electrode directly or through a resistor at the drain end thereof. When a high voltage is applied, a depletion layer expands in the n-type drift region from an interface between the n-type drift region and the trench on each side of the n-type drift region, therefore, the impurity concentration of the n-type drift region can be heightened without lowering the high breakdown voltage, and the resistance of the drift region can be decreased.

High breakdown voltage semiconductor device having trenched film connected to electrodes

The technological development of application specific VDMOS and lateral trench power MOSFETs is described. Unlike general-purpose trench vertical DMOS, application specific trench DMOS comprise devices merged or optimized for a specific function or characteristic. Examples include the bidirectional lithium ion battery disconnect switch, the airbag squib driver with safety redundancy, the antilock breaking systems solenoid driver with repeated avalanche operation, and various forms of synchronous rectifiers (including integrated Schottky and pseudo-Schottky operation). Trench lateral DMOS include all implant quasi-vertical, lateral trench, and lateral trench charge balanced devices. Trench power MOSFET packaging addresses multichip surface mount, DrMOS, low inductance, and clip lead packages.

The Trench Power MOSFET—Part II: Application Specific VDMOS, LDMOS, Packaging, and Reliability

A power MOSFET comprising a drain layer of a first conductivity type, a drift layer of the first conductivity type provided on the drain layer, a base layer of a first or a second conductivity type provided on the drift layer, a source region of the first conductivity type provided on the base layer, a gate insulating film formed on an inner wall surface of a trench penetrating the base layer and reaching at the drift layer, and a gate electrode provided on the gate insulating film inside the trench, wherein the gate insulating film is formed such that a portion thereof adjacent to the drift layer is thicker than a portion thereof adjacent to the base layer, and the drift layer has an impurity concentration gradient higher in the vicinity of the drain layer and lower in the vicinity of the source region along a depth direction of trench.

Yusuke Kawaguchi

Papers

High-breakdown-voltage semiconductor device

The Trench Power MOSFET: Part I—History, Technology, and Prospects

High breakdown voltage semiconductor device having trenched film connected to electrodes

The Trench Power MOSFET—Part II: Application Specific VDMOS, LDMOS, Packaging, and Reliability

Vertical type power MOSFET having trenched gate structure