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Showing papers by "International Rectifier published in 2006"


Patent
30 Mar 2006
TL;DR: In this article, a boost type power supply circuit for providing a DC output voltage comprising first and second semiconductor switches coupled between respective input lines and a common connection is presented, where the controller determines an on-time and an off-time of a pulse of the pulse width modulated control signal during each half cycle of the AC voltage, the ontime and offtime being controlled to regulate output voltage and to provide power factor correction of said AC input voltage, based on either voltage sensing or current sensing.
Abstract: A boost type power supply circuit for providing a DC output voltage comprising first and second semiconductor switches coupled between respective input lines and a common connection; an AC input voltage from an AC source being supplied across the input lines; first and second diodes coupled in series with respective ones of the switches; third and fourth diodes coupled across respective ones of the switches in a free-wheeling relationship with the switches; an inductance coupled in at least one of the input lines; a controller for controlling the conduction times of the switches by providing a pulse width control signal to each of the switches; wherein the controller turns on at least one of the switches during a positive half cycle of the AC voltage to allow energy storage in the inductance and turns off the at least one switch to allow the energy stored in the inductance to be supplied to an attached load through one of the first and second diodes and one of the third or fourth diodes; and the controller turns on at least one of the switches during a negative half cycle of the AC voltage to allow energy storage in the inductance and turns off at least one switch to allow the energy stored in the inductance to be supplied to the attached load through one of the first and second diodes and one of the third and fourth diodes The controller determines an on-time and an off-time of a pulse of the pulse width modulated control signal during each half cycle of the AC voltage, the on-time and off-time of the pulse being controlled to regulate said output voltage and to provide power factor correction of said AC input voltage, based on either voltage sensing or current sensing

91 citations


Patent
28 Jun 2006
TL;DR: In this article, a catch start sequencer is used to find and track the rotor position, and then determine the speed and direction of rotation of the rotor in a forward or reverse direction.
Abstract: A motor drive system for a sensorless motor includes a catch start sequencer that controls the motor drive system to robustly start the motor in the event the motor rotor is rotating in forward or reverse direction prior to activating the motor drive system. In particular, the catch start sequencer causes the motor drive system to initially find and track the rotor position, and then determines the speed and possibly the direction of rotation of the rotor. If the rotor is rotating in the reverse direction, the catch start sequencer controls the motor drive system to slow the speed of rotation and to then start the rotor rotating in the forward direction.

85 citations


Patent
19 Dec 2006
TL;DR: A semiconductor device package is formed of DBC in which thinned MOSgated and/or diode die are soldered to the bottom of an etched depression in the upper conductive layer.
Abstract: A semiconductor device package is formed of DBC in which thinned MOSgated and/or diode die are soldered to the bottom of an etched depression in the upper conductive layer. A via in the insulation layer of the DBC is filled with a conductive material to form a resistive shunt. Plural packages may be formed in a DBC card and may be separated individually or in clusters. The individual packages are mounted in various arrays on a support DBC board and heat sink. Integrated circuits may be mounted on the assembly and connected to the die for control of the die conduction.

75 citations


Patent
Yong Li1
26 Apr 2006
TL;DR: In this article, a boost converter circuit and a control circuit for providing power factor correction in accordance with an embodiment of the present application may include a boosting inductor, a boost inductor and the DC bus voltage across the capacitor of the boost converter.
Abstract: A circuit for providing power factor correction in accordance with an embodiment of the present application may include a boost converter circuit and a control circuit receiving as inputs a rectified AC input voltage from a rectifier, a signal proportional to current through the boost inductor and the DC bus voltage across the capacitor of the boost converter. The control circuit provides a pulse width modulated signal to control the on time of a PFC switch. The control circuit further includes a voltage regulator and a current regulator. The current regulator includes a difference device operable to subtract a signal proportional to the inductor current from the current reference signal, a PI controller adapted to receive the output of the difference device and provide a first control signal, a feed forward device operable to receive the rectified AC input voltage and to provide a second control signal with a smaller dynamic range than the AC input voltage, and an adder operable to add the first control signal to the second control signal to provide a PWM reference signal for generating the pulse width modulated signal. A zero crossing detector and vector rotator may be provided to provide a clean sinusoidal reference to the current regulator. A partial PFC regulator may be provide to provide partial mode PFC if desired.

70 citations


Patent
06 Jul 2006
TL;DR: In this paper, a three-nitride power semiconductor device with a two-dimensional electron gas and a gate arrangement was proposed. But the method for fabricating the device was not described.
Abstract: A III-nitride power semiconductor device that includes a nitrogen polar active heterojunction having a two-dimensional electron gas and including a first III-nitride semiconductor body by one band gap and a second III-nitride body having another band gap over the first III-nitride semiconductor body, a gate arrangement, a gate barrier under the gate arrangement thereof, a first power electrode and a second power electrode, and a method for fabricating the device.

62 citations


Patent
10 Jan 2006
TL;DR: In this article, a fabrication process for a trench Schottky diode with differential oxide thickness within the trenches includes forming a first nitride layer on a substrate surface and subsequently forming a plurality of trenches in the substrate including, possibly, a termination trench.
Abstract: A fabrication process for a trench Schottky diode with differential oxide thickness within the trenches includes forming a first nitride layer on a substrate surface and subsequently forming a plurality of trenches in the substrate including, possibly, a termination trench. Following a sacrificial oxide layer formation and removal, sidewall and bottom surfaces of the trenches are oxidized. A second nitride layer is then applied to the substrate and etched such that the second nitride layer covers the oxide layer on the trench sidewalls but exposes the oxide layer on the trench bottom surfaces. The trench bottom surfaces are then re-oxidized and the remaining second nitride layer then removed from the sidewalls, resulting in an oxide layer of varying thickness being formed on the sidewall and bottom surfaces of each trench. The trenches are then filled with a P type polysilicon, the first nitride layer removed, and a Schottky barrier metal applied to the substrate surface.

50 citations


Patent
17 Mar 2006
TL;DR: In this paper, an analog sensing circuit and a mutliplexer on a point-of-load regulator communicate operational parameters to and from the manager via the analog bus and are controlled via the digital bus.
Abstract: A power control system and method including a plurality of point-of-load regulators (POL) providing corresponding regulated output voltages; a manager for communicating control signals and operational parameters with said point-of load regulators; a digital bus to carry control signals therebetween; and an analog bus to carry operational parameters therebetween. Analog sensing circuits and a mutliplexer on the POL communicate operational parameters to and from the manager via the analog bus and are controlled via the digital bus. The operational parameters include output voltage, output current, over voltage, temperature, amplifier or comparator offset, and amplifier gain. The analog sensing circuits are calibrated by trim registers on the POL under digital control by the manager.

49 citations


Patent
21 Jul 2006
TL;DR: In this article, a plurality of parameters of a Permanent Magnet Synchronous Motor (PMSM) is determined by a motor controller for differentiating between plurality of PMSMs by applying regulated DC motor currents at a commanded fixed rotor angle and measuring a quadrature voltage.
Abstract: A plurality of parameters of a Permanent Magnet Synchronous Motor (PMSM) is determined by a motor controller for differentiating between a plurality of PMSMs. This is achieved by first applying regulated DC motor currents at a commanded fixed rotor angle and measuring a quadrature voltage; parking the PMSM at standstill, Then, after selecting an initial set of controller parameters; applying the quadrature voltage equal to zero and measuring a time constant. Then, accelerating the PMSM with a constant torque up to a preset target speed and measuring a total acceleration time taccelerate until the preset target speed ωtarget is reached. After regulating a stator current at 0 value, measuring the quadrature voltage and a freewheeling motor speed ωfreewheel immediately after applying the 0 stator current; and calculating an electrical constant KE of the PMSM; a load inertia J; and a set of parameters for the controller.

45 citations


Patent
24 Apr 2006
TL;DR: A semiconductor device package includes a substrate with one or more pads and at least one semiconductor devices that has one or many of its electrodes electrically connected to the substrate pads as discussed by the authors.
Abstract: A semiconductor device package includes a substrate with one or more pads and at least one semiconductor device that has one or more of its electrodes electrically connected to the substrate pads. The package also includes one or more terminals in electrical connection with the substrate pads and that provide for external connection to the device.

45 citations


Patent
28 Mar 2006
TL;DR: In this paper, a bridgeless PFC boost converter with first and second primary MOSFETs was proposed, and a boost inductor was connected between the second primary and the second switch.
Abstract: A circuit and method for improving current sensing in a bridgeless PFC boost converter. Such a converter comprises a current transformer having first and second primaries; a boost inductor having a first end connected to a first AC input terminal and a second end connected to a first junction defined between the anode of a first diode and a first end of the first primary, the second end of the first primary being connected to a first terminal of the first switch; a second terminal of the first switch being connected to a common line; a parallel circuit of a capacitance and a load connected between the cathode of the first diode and the common line; a series circuit of a second diode, the second primary and a second switch connected between the cathode of the first diode and the common line; and a second AC input terminal connected to a second junction defined between the second primary and the second switch. A second boost inductor may be connected between the second AC input terminal and the second junction. The first and second switches may be MOSFETs. The circuit also includes a rectification circuit on first and second secondaries of the current transformer, comprising a MOSFET and additional diodes.

43 citations


Patent
27 Jun 2006
TL;DR: In this article, the authors proposed a method for controlling a high electron mobility transistor (HEMT) through a cascode circuit, which consists of a first and second switch, a condenser connected to the source of the first switch, and a source of a HEMT connected to a drain of the second switch.
Abstract: PROBLEM TO BE SOLVED: To provide a method for controlling a high electron mobility transistor (HEMT) through a cascode circuit. SOLUTION: The cascode circuit according to the present invention comprises a first and second switch, a condenser connected to a source of the first switch, a source of a HEMT connected to a drain of the first switch, and a controller controlling the first and second switch. This method can be obtained by defining a state A in which it is controlled that the first switch is OFF and the second switch is ON and the condenser is allowed to be charged, thereby stabilizing a drain voltage of the HEMT around a HEMT gate threshold voltage. The method further defines a state B in which it is controlled that the first switch is ON and the second switch is substantially OFF, and a charge accumulated in the condenser is maintained. By changing the states, further the method allows an output capacitance of the first switch from the condenser to be more rapidly charged. COPYRIGHT: (C)2007,JPO&INPIT

Patent
21 Jul 2006
TL;DR: In this paper, a multi-phase converter comprising 2N+1 inductors and 2N + 1 switching converters is presented, where a pair of inductors are coupled and wound about a common core and each coupled inductor is connected at one pole thereof to a respective switched node and at another pole to an output node, at least one of said inductors is uncoupled from the other inductors.
Abstract: A multi-phase converter comprising 2N+1 inductors; and 2N+1 switching converters parallel connected and each including a switched node; wherein N is an even integer, a pair of said inductors are coupled and wound about a common core and each said coupled inductor is connected at one pole thereof to a respective switched node and at another pole thereof to an output node, and at least one of said inductors is uncoupled from the other inductors.

Patent
13 Dec 2006
TL;DR: In this article, a III-nitride power device for controlling high currents as an interdigitated electrode pattern for increasing device rating while decreasing device dimensions is presented, where the tip of the fingers of the inter-digitated pattern have smaller dimensions than the remainder of the finger.
Abstract: A III-nitride power device for controlling high currents as an interdigitated electrode pattern for increasing device rating while decreasing device dimensions. Fingers of the interdigitated electrode pattern have tips with smaller dimensions than the remainder of the fingers. The tapered finger design balances current flow in the electrode fingers to reduce device resistance while permitting a more compact construction.

Patent
04 Dec 2006
TL;DR: In this paper, the authors describe a III-nitride (e.g., gallium nitride) material region and methods associated with such structures, which can form the basis of a number of semiconductor devices including transistors and Schottky diodes.
Abstract: Semiconductor structures comprising a III-nitride (e.g., gallium nitride) material region and methods associated with such structures are provided. In some embodiments, the structures include an electrically conductive material (e.g., gold) separated from certain other region(s) of the structure (e.g., a silicon substrate) by a barrier material in order to limit, or prevent, undesirable reactions between the electrically conductive material and the other component(s) which can impair device performance. In certain embodiments, the electrically conductive material may be formed in a via. For example, the via can extend from a topside of the device to a backside so that the electrically conductive material connects a topside contact to a backside contact. The structures described herein may form the basis of a number of semiconductor devices including transistors (e.g., FET), Schottky diodes, light-emitting diodes and laser diodes, amongst others.

Patent
18 Oct 2006
TL;DR: In this paper, a method of singulating a semiconductor die from a wafer is described, which includes etching or cutting several trenches into the wafer from a front surface of the wafers, such that each trench extends along an entire side of the die.
Abstract: A method of singulating a semiconductor die from a wafer is provided. The method includes etching or cutting several trenches into the wafer from a front surface of the wafer, such that each trench extends along an entire side of the die; depositing a passivation layer into the trenches to form a passivation plug on at least a bottom of the trenches to protect the dies and immobilize them during singulation; and forming a rigid carrier layer or plate at the first side of the wafer to secure the dies. The wafer is then ground from the back side to expose the bottom of each trench, a metal layer is formed on the back surface of the wafer; dicing tape is added, the carrier layer is removed, and the die is separated from the wafer by laser cutting or by flexing the tape.

Patent
20 Sep 2006
TL;DR: In this paper, the authors proposed a safety circuit for providing protection against failures that impact safety of an inverter circuit driving a Permanent Magnet Synchronous Motor (PMSM) including high and low side switches connected in a bridge and driven by a gate driver circuit during operation of the PMSM in a field weakening mode.
Abstract: A safety circuit for providing protection against failures that impact safety of an inverter circuit driving a Permanent Magnet Synchronous Motor (PMSM) including high and low side switches connected in a bridge and driven by a gate driver circuit during operation of the PMSM in a field weakening mode, the gate driver circuit including stages for driving the high and low side switches, the safety circuit comprising a main power supply and a back-up power supply for supplying voltage to the gate driver circuit driving the switches of the bridge of the inverter circuit, wherein if the main power supply fails to deliver adequate power to the gate driver circuit, the back-up power supply provides power to the gate driver circuit to allow the gate driver circuit to turn ON the low side switches and turn OFF the high side switches.

Patent
02 Feb 2006
TL;DR: In this article, a Schottky electrode is integrated with a power switch in a III-nitride power device, which is used in power supply circuits such as a boost converter circuit.
Abstract: A III-nitride power device that includes a Schottky electrode integrated with a power switch. The combination is used in power supply circuits such as a boost converter circuit.

Patent
16 Oct 2006
TL;DR: A SiC Schottky diode which includes a SiC barrier formed on a silicon face 4H-SiC body is described in this article. But this is not the case in this paper.
Abstract: A SiC Schottky diode which includes a Schottky barrier formed on a silicon face 4H—SiC body.

Journal ArticleDOI
TL;DR: In this article, an experimental study of the behavior of electrical parameters of Schottky barrier diodes (SBD) fabricated on the Si face of 4H-SiC epitaxial layers with respect to temperature is shown.

Patent
24 Apr 2006
TL;DR: A semiconductor device package includes a die pad, a substrate disposed on the die pad and a III-nitride based semiconductor based device disposed on a substrate as discussed by the authors, which may be electrically connected to the third-nide based device to form a circuit.
Abstract: A semiconductor device package includes a die pad, a substrate disposed on the die pad, and a III-nitride based semiconductor device disposed on the substrate. The device package may also include a second semiconductor device disposed on the die pad or the substrate, which device may be electrically connected to the III-nitride based device to form a circuit.


Patent
26 Jun 2006
TL;DR: A power module that includes embedded power bus bars and output bus arranged to lower the parasitic inductance was proposed in this article, where the output bus is connected to the power module.
Abstract: A power module that includes embedded power bus bars and output bus arranged to lower the parasitic inductance.

Patent
05 Jul 2006
TL;DR: In this paper, an SiC Schottky diode die is mounted with its epitaxial anode surface connected to the best heat sink surface in the device package to increase the surge current capability of the device.
Abstract: An SiC Schottky diode die or a Si Schottky diode die is mounted with its epitaxial anode surface connected to the best heat sink surface in the device package. This produces a substantial increase in the surge current capability of the device.

Patent
06 Mar 2006
TL;DR: An electronic ballast for driving a high intensity discharge (HID) lamp is provided in this paper, which includes a voltage boost stage for receiving a DC input voltage and outputting a boosted DC output voltage with a controlled current.
Abstract: An electronic ballast for driving a high intensity discharge (HID) lamp is provided. The electronic ballast includes a voltage boost stage for receiving a DC input voltage and outputting a boosted DC output voltage with a controlled current. It further includes a switching stage for converting the boosted DC output voltage to a switched AC voltage capable of driving the HID lamp. An integrated circuit (IC) is coupled to the voltage boost stage and the switching stage for controlling both. The IC includes a lamp power control circuit comprising a sensing circuit for sensing an output current from the switching stage and the boosted DC output voltage, a current control loop which controls the lamp power if the lamp current is at a maximum level and a power control loop which controls the lamp power if the lamp current is below a maximum level. The IC also includes a controller unit interface and provides an ignition mode and a regular operation mode.

Patent
01 Mar 2006
TL;DR: A silicon carbide device has a termination region that includes a mesa region that links the termination region to an active area of the device and that includes one or more trenches as mentioned in this paper.
Abstract: A silicon carbide device has a termination region that includes a mesa region that links the termination region to an active area of the device and that includes one or more trenches.

Patent
16 Jun 2006
TL;DR: In this paper, a boost converter in accordance with an embodiment of the present application includes an input rectifying bridge adapted to rectify an input AC voltage, a first inductor connected to the input rectification bridge, a output capacitor coupled to first inductors for connection to a DC bus, a bidirectional semiconductor switch coupled between the output capacitor and the first inductions, a second inductor positioned adjacent to the first induction with a first end connected to a common ground and a second bid-irectional switch positioned between the second inductors and the output capacitance.
Abstract: A boost converter in accordance with an embodiment of the present application includes an input rectifying bridge adapted to rectify an input AC voltage, a first inductor connected to the input rectifying bridge, a output capacitor coupled to first inductor for connection to a DC bus, a first bidirectional semiconductor switch coupled between the output capacitor and the first inductor, a second inductor positioned adjacent to the first inductor with a first end connected to a common ground and a second bidirectional semiconductor switch positioned between the second inductor and the output capacitor. An inrush control device may be provided to control the first and second bidirectional semiconductor switches to prevent current inrush.

Patent
26 Jun 2006
TL;DR: In this article, a circuit is provided for converting power from an AC power source to DC power, including a transformer having one or more primary windings and a secondary winding, each primary winding being coupled to one of the bi-directional switch sources.
Abstract: A circuit is provided for converting power from an AC power source to DC power. The circuit including bi-directional switches capable of conducting and blocking a current flow in both directions. One or more control switches are coupled to a bi-directional switch to enable and disable the current flow through the bi-directional switch, the control switches are controlled by a signal voltage to turn a bi-directional switch ON by discharging a threshold voltage on one of the bi-directional switch gates and turning a bi-directional switch OFF when the threshold voltage is not discharged by the control switches. Additionally, the circuit includes a transformer having one or more primary windings and a secondary winding, each primary winding being coupled to one of the bi-directional switch sources. The current flow through the primary winding is disabled when the current flow through the corresponding bi-directional switch source is disabled.

Patent
26 Oct 2006
TL;DR: In this paper, a method and system for reducing audible motor noise in a system for reconstructing motor phase current from DC bus current comprising current pulses on a DC bus in PWM inverter motor drive system having a PWM cycle is presented.
Abstract: A method and system for reducing audible motor noise in a system for reconstructing motor phase current from a DC bus current comprising current pulses on a DC bus in a PWM inverter motor drive system having a PWM cycle, and for controlling the motor, which forms a command voltage vector according to a space vector modulation arrangement for controlling the motor; measures the DC bus current on the DC bus supplying power to the inverter to reconstruct said motor phase current; and determines when the command voltage vector results in an inverter switching state that prevents the measuring of the DC bus current from accurately indicating motor phase current. During said inverter switching state, a current sampling scheduler applies a minimum pulse width constraint to said current pulses in said DC bus current to improve reconstruction of said motor phase current based on said DC bus current; and reduces the application of said minimum pulse width constraint to less than once per PWM cycle imposed by the PWM inverter motor drive system, thereby allowing motor phase current reconstruction with reduced audible motor noise. The current sampling scheduler synchronously samples said measured motor phase current to reduce errors in said measured motor phase current caused by said reduction of said minimum pulse constraint; reduces a bandwidth of said motor controller during said inverter switching state; and is adjustable in response to motor speed for setting the number of said minimum pulse width constraints per PWM cycle.

Patent
20 Oct 2006
TL;DR: In this article, a driver circuit for driving a ballast power switching circuit powering a gas discharge lamp is described, along with an oscillator circuit for providing an oscillating signal to control the frequency of operation.
Abstract: A dimming ballast control circuit for driving a ballast power switching circuit powering a gas discharge lamp. The circuit includes a driver circuit for driving high and low side switches of the ballast power switching circuit; a control circuit for driving the driver circuit including an oscillator circuit for providing an oscillating signal to control the frequency of operation of the ballast power switching circuit, the ballast power switching circuit outputting lamp powering pulsed signals; and a dimming control circuit having an input, the dimming control circuit receiving an AC lamp current feedback signal at the input, the dimming control circuit further receiving a DC input voltage reference at the input whereby the DC input voltage reference determines a desired dimming level of the lamp and the AC lamp current feedback signal maintains the lamp brightness at the desired dimming level.

Patent
14 Feb 2006
TL;DR: In this article, a circuit for protecting against controller failure is proposed, where the controller provides control signals for controlling a DC to AC inverter fed by a DC bus and driving a permanent magnet motor.
Abstract: A circuit for protecting against controller failure wherein the controller provides control signals for controlling a DC to AC inverter fed by a DC bus and driving a permanent magnet motor, the circuit comprising a first circuit for monitoring the DC bus voltage and, in the event the DC bus voltage exceeds a first threshold due to a counter EMF generated by the motor, for producing a signal to the controller to provide a switch state to the inverter whereby the counter EMF is dissipated substantially in a motor circuit resistance of the permanent magnet motor as a result of a short circuit condition provided by the switch state of the inverter, thereby preventing the DC bus voltage of the inverter from exceeding the first threshold and causing the permanent magnet motor speed to be reduced.