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Showing papers by "Samsung published in 1994"


Patent
Yong-Soon Mun1
30 Dec 1994
TL;DR: In this article, a home automation system having a user controlled definition function is operated in response to input of an inherent call code, which includes power line controller PLC modules for switching power to appliances connected to the home automation systems, monitoring devices for displaying input video information; a video display processing device having a font memory and a video memory for assessing font data corresponding to a character code received from the font memory, and providing a video signal corresponding to the assessed font data to the monitoring device; a control device for providing to the video display processor character code corresponding to user defined number
Abstract: A home automation system having a user controlled definition function is operated in response to input of an inherent call code. The system includes power line controller PLC modules for switching power to appliances connected thereto in response to receipt of a control code; monitoring devices for displaying input video information; a video display processing device having a font memory and a video memory for assessing font data corresponding to a character code received from the font memory in response to receipt of the character code and for providing a video signal corresponding to the assessed font data to the monitoring device; a control device for providing to the video display processing device character code corresponding to a user defined number, device name, call code, and control code in response to a set user defined function; the control device also stores the user defined number, the call code, and the control code in an address region corresponding to the user defined number, and transmits the call code and control code in response to input of the user defined number; and an interfacing device for transmitting the call code and control code output from the control device to the power line controller PLC modules.

201 citations


Patent
16 Feb 1994
TL;DR: In this article, a remote video transmission system for digitizing and compressing an audio/visual signal, transmitting that signal over low band width lines, such as land telephone lines, cellular telephone lines or radio frequencies, decompressing the digitized data and converting it to an audio or visual signal for broadcast.
Abstract: A remote video transmission system for digitizing and compressing an audio/visual signal, transmitting that signal over low band width lines, such as land telephone lines, cellular telephone lines, or radio frequencies, decompressing the digitized data and converting it to an audio/visual signal for broadcast. Components of this system include: A remote unit, a host unit, and a playback unit. The remote unit is capable of digitizing and compressing the audio/visual signal as well as transmitting the compressed, digitized data. Data may be divided and sent to multiple ports for output. Data may also be edited prior to transmission. The host unit is automated to receive data transmitted from the remote unit and reassemble the data if it has been divided. The playback unit stores and automatically catalogs transmitted data files. The player unit also decompresses the digitized data files and converts them to an audio/visual signal which may then be broadcast. The audio/visual signal can either be NTSC, PAL, or Y/C video.

193 citations


Patent
04 Oct 1994
TL;DR: In this paper, an additional optimization layer (610) is added to the stack between the existing layers to reduce the size of data packets, which can be transmitted over the wireless WAN, increasing WAN efficiency.
Abstract: Standard protocols, such as those commonly used on LAN networks, are used to connect nodes (104, 106, 108, and 110) to an enterprise network (102) via a wide area wireless network (100). Within the appropriate protocol stacks, the standard protocols are optimized by filtering some packets, eliminating and reducing the size of data packets. The optimized data packets can be transmitted over the wireless WAN, increasing WAN efficiency. The optimization is accomplished by inserting an additional optimization layer (610) into the stack between the existing layers. The optimization layer accepts the normal protocol signals generated by the surrounding layers and generates outputs which mimic protocol layers which the surrounding layers expect. Consequently, the optimization layer operates transparently with respect to the existing protocol stack layers.

162 citations


Patent
08 Dec 1994
TL;DR: In this paper, a gas supply apparatus for semiconductor device manufacturing is described, which provides a showerhead for evenly supplying various kinds of gases to a reaction chamber, thereby improving the uniformity of the film thickness.
Abstract: A gas supply apparatus, for use in a semiconductor device manufacturing process, provides a showerhead for evenly supplying various kinds of gases to a reaction chamber. The gas supplying apparatus for use in the formation of a thin film of a semiconductor device includes a first porous plate having a plurality of first holes formed throughout its surface, and a central bore formed at its center; and a second porous plate having first projections which are regularly formed throughout its central portion, and second projections which contain depressions continuously formed around the first projections. The gas supplying apparatus evenly distributes gas into the reaction chamber, thereby improving the uniformity of the film thickness to be grown on a substrate.

155 citations


Patent
Young Sup Kwon1, Seung Ho Ahn1
18 Nov 1994
TL;DR: In this article, a ball grid array (BGA) is used for performing interconnection to make the BGA overcome a typically two-dimensional flat mounting and attain a three-dimensional surface mounting structure while being perfectly compatible with a currently available mounting process on the main substrate.
Abstract: A semiconductor device having at least one semiconductor chip loaded on a lower surface of a printed circuit board, electrode terminals of the semiconductor chip wire-bonded to terminals on the printed circuit board, and a connection portion of the semiconductor chip and wires encapsulated by means of encapsulating resin includes a semiconductor device of three-dimensional structure having the printed circuit board reversely mounted, the terminals of the printed circuit board connected to external terminals via through holes, and at least one semiconductor device stacked on an upper surface of the printed circuit board, thereby interconnecting respective semiconductor devices while interposing solder balls to be mounted to other printed circuit boards by leads being the external terminals Thus, a ball grid array (BGA) package able to be stacked inside a small out-line J-lead (SOJ) package is used for performing interconnection to make the BGA overcome a typically two-dimensional flat mounting and attain a three-dimensional surface mounting structure while being perfectly compatible with a currently-available mounting process on the main substrate, thereby improving mounting efficiency

155 citations


Journal ArticleDOI
TL;DR: In this article, a new family of explicit single-step time integration methods with controllable high-frequency dissipation is presented for linear and non-linear structural dynamic analyses.
Abstract: A new family of explicit single-step time integration methods with controllable high-frequency dissipation is presented for linear and non-linear structural dynamic analyses. The proposed methods are second-order accurate and completely explicit with a diagonal mass matrix, even when the damping matrix is not diagonal in the linear structural dynamics or the internal force vector is a function of velocities in the non-linear structural dynamics. Stability and accuracy of the new explicit methods are analysed for the linear undamped/damped cases. Furthermore, the new methods are compared with other explicit methods.

144 citations


Journal ArticleDOI
Min Hee Kim1, Yeong-Dae Kim2
TL;DR: In this article, a simulation-based real-time scheduling methodology for a flexible manufacturing system is presented, in which the job dispatching rule varies dynamically based on information from discrete event simulation that evaluates a set of candidate rules.

136 citations


Patent
Ji-Hyun Kim1
27 Sep 1994
TL;DR: In this article, a self-propulsion mechanism for advancing the robot during a cleaning operation, and a cord that can be plugged into an external power supply for powering the cleaning device and self propulsion mechanism and a vacuuming mechanism during the cleaning operation.
Abstract: A cleaning robot is operable in either a cord mode (by means of a plugged-in cord) or a cordless mode (by means of a battery). The robot includes a self-propulsion mechanism for advancing the robot during a cleaning operation, and a cord that can be plugged into an external power supply for powering the cleaning device and self-propulsion mechanism and a vacuuming mechanism during the cleaning operation. Following the cleaning operation, the vacuuming mechanism is deactivated, and the self-propulsion mechanism is powered by a battery carried by the robot for advancing the robot to the next area to be cleaned.

128 citations


Patent
25 Oct 1994
TL;DR: In this article, the edge region of an input image signal is detected, minimum and maximum signals are generated for the detected edge region, the input signal of the region is compared with the average signal of both the minimum and the maximum signals, and the output signal is output if the average of the detected region is equal to the minimum or maximum signal.
Abstract: Disclosed is an edge sharpening method using maximum and minimum filters. In an embodiment of the present invention, the edge region of an input image signal is detected, minimum and maximum signals are generated for the detected edge region, the input signal of the detected edge region is compared with the average signal of the minimum and maximum signals, and the average of the input signal and the maximum signal is output if the input signal is larger than the average signal, the average of the input signal and the minimum signal is output if the input signal is smaller than the average signal, and the input signal is output if the input signal is equal to the average signal. Meanwhile, median filtering, using a window perpendicular to the direction in which the edge sharpening is performed, is performed on the region on which the edge sharpening has been performed.

120 citations


Patent
Kim Jin-Gi1, Lee Wo Ong-Mu
04 Jan 1994
TL;DR: In this article, a high voltage generating circuit including a circuit for erasing and programming operations, an EEPROM fuse circuit connected to the circuit for generating the given reference voltage and having stored data, whereby the voltage level of the high voltage finally output may be properly maintained and controlled according to the state of stored data.
Abstract: There is provided a high voltage generating circuit including a circuit for sensing a voltage level of a high voltage for erasing and programming operations, a circuit for generating a given reference voltage, a circuit for comparing the sensed high voltage with the reference voltage, a circuit for applying or blocking a pump signal to a high voltage pump circuit according to the compared signal, a circuit for raising the voltage up to a given level under the control of the pump signal, and an EEPROM fuse circuit connected to the circuit for sensing the voltage level of the high voltage or the circuit for generating the given reference voltage and having stored data, whereby the voltage level of the high voltage finally output may be properly maintained and controlled according to the state of the stored data.

117 citations


Patent
Young-Ii Kim1
13 Jun 1994
TL;DR: In this article, a traffic control method and system for a broadband user-network interface which connects subscriber terminals to a public network in an ATM exchange including a broadband-terminal equipment, a local exchange which fixedly assigns virtual path identifiers in accordance with traffic characteristics and processes the traffic received through the assigned virtual path identifier and a virtual channel identifier, and a broadband network termination disposed between the broadband terminal equipment and the local exchange for modulating and demodulating a signal transmitted/received and outputs a modulated/demodulated signal.
Abstract: A traffic control method and system for a broadband user-network interface which connects subscriber terminals to a public network in an ATM exchange including a broadband-terminal equipment, a local exchange which fixedly assigns virtual path identifiers in accordance with traffic characteristics and processes the traffic received through the assigned virtual path identifiers and a virtual channel identifier, and a broadband-network termination disposed between the broadband-terminal equipment and the local exchange for modulating and demodulating a signal transmitted/received and outputs a modulated/demodulated signal. The broadband-network termination includes a connection control unit for analyzing call establishment request information from one of a plurality of subscriber terminals to thereby detect a corresponding traffic class, quality of service and address of destination, and controlling connection admission based upon detected information and simultaneously outputting transmission bandwidth information to thereby assign a virtual channel identifier; a generic flow control unit for analyzing a generic function control field in a cell header of a received cell generated from a call connected through the connection admission control unit to fairly use public media used by the plurality of subscriber terminals for minimizing cell transmission delay; a traffic control unit for monitoring whether the received cell indicative of the call violates traffic parameters described by the calling subscriber terminal and controlling a cell loss priority bit in a corresponding cell header to thereby execute cell transmission, cell shaping, and cell discarding.

Patent
Jae Moon Jo1, Je Chang Jeon1
16 Dec 1994
TL;DR: In this paper, an adaptive variable-length coding/decoding method performs an optimal variablelength coding and decoding depending on an intra mode/inter mode condition, quantization step size and a current zigzag scanning position, such that a plurality of variable length coding tables having different patterns of a regular region and an escape region according to statistical characteristics of the run level data are set.
Abstract: An adaptive variable-length coding/decoding method performs an optimal variable-length coding and decoding depending on an intra mode/inter mode condition, quantization step size and a current zigzag scanning position, such that a plurality of variable-length coding tables having different patterns of a regular region and an escape region according to statistical characteristics of the run level data are set. One of the variable-length coding tables is selected according to mode, quantization step size and scanning position, and the orthogonal transform coefficients according to the selected variable-length coding table are variable-length-coded.

Patent
Hyoungsub Kim1
18 May 1994
TL;DR: In this paper, the authors propose a planarizing layer formed in recesses in the gate lines, an insulating layer formed on the upper surfaces of the gate line and planarising layer, and a storage node of a capacitor formed with the contact holes and adjacent surface portions of the INSulating layer, in contact with the source region of respective ones of the silicon pillars.
Abstract: A semiconductor device, e.g., a DRAM, having vertical conduction transistors and cylindrical cell gates, which includes a plurality of spaced-apart trench isolation regions formed in a semiconductor substrate, a plurality of bit lines formed on the semiconductor substrate, a silicon pillar formed on each bit line, a gate insulating layer and gate line formed on each silicon pillar in surrounding relationship thereto, a planarizing layer formed in recesses in the gate lines, an insulating layer formed on the upper surfaces of the gate line and planarizing layer, a plurality of contact holes provided in vertically aligned portions of the insulating layer, the gate line, and the gate insulating layer located above respective ones of the silicon pillars, and, a storage node of a capacitor formed with the contact holes and adjacent surface portions of the insulating layer, in contact with the source region of respective ones of the silicon pillars. Each of the silicon pillars includes vertically stacked layers which serve as respective drain, channel, and source regions of a transistor.

Journal ArticleDOI
01 Mar 1994
TL;DR: A simple time delay method for avoiding collisions between two general robot arms is proposed and a computer simulation study is shown where a collision is likely to occur realistically.
Abstract: A simple time delay method for avoiding collisions between two general robot arms is proposed. Links of the robots are approximated by polyhedra and the danger of collision between two robots is expressed by distance functions defined between the robots. The collision map scheme, which can describe collisions between two robots effectively, is adopted. The minimum delay time value needed for collision avoidance is obtained by a simple procedure of following the boundary contour of collision region on collision map. To demonstrate the effectiveness of the proposed time delay method, a computer simulation study is shown where a collision is likely to occur realistically. >

Patent
Je-woo Kim1, Jong-Hyeon Park1
27 Dec 1994
TL;DR: In this article, a DS/SS-CDMA system with a PN code unique to each mobile station is described, where the PN codes are modulated by the data and the identification frequency is shifted by an identification frequency to output a spread spectrum signal.
Abstract: Disclosed is a link access apparatus of a CDMA system using a DS/SS communication method, and more particularly an up-link access apparatus which overcomes a near/far problem occurring when mobile stations and a base station perform multiple access communication using code division. An up-link access apparatus in a DS/SS-CDMA system has a transmitter for mixing data to be transmitted to a base station with a PN code unique to that mobile station to thereby PN code modulate the data. The transmitter then mixes the PN code modulated data with a carrier having a frequency that is shifted by an identification frequency to thereby output a spread spectrum signal. The apparatus further includes a receiver for mixing a demodulation carrier made up of the PN code and the identification frequency with the spread spectrum signal from the transmitter to thereby output a mixed signal. The mixed signal is then integrated according to a period having a reciprocal corresponding to the identification frequency, demodulated and output as a digital signal.

Patent
Sung-geol Ryoo1, Seo Yang Seok1
28 Sep 1994
TL;DR: In this paper, a color correction method for dividing a color space and producing a colour correction coefficient for respective regions is presented, which comprises the steps of receiving image data, discriminating a region to which the input data pertains and selecting a color corrections coefficient in accordance with the region so as to produce the selected one, performing color correction by operating the selected color correction coefficient and the input images, and outputting the color corrected image data.
Abstract: The present invention relates to a color correction method for dividing a color space and producing a color correction coefficient for respective regions. The method comprises the steps of receiving image data, discriminating a region to which the input data pertains and selecting a color correction coefficient in accordance with the region so as to produce the selected one, performing color correction by operating the selected color correction coefficient and the input data, and outputting the color-corrected image data.

Patent
28 Jun 1994
TL;DR: In this article, a radio receiver for receiving a selected digital HDTV signal, irrespective of whether it is a complex-amplitude-modulation (QAM) or a vestigial sideband (VSB) signal, using the same tuner is presented.
Abstract: A radio receiver for receiving a selected digital HDTV signal, irrespective of whether it is a complex-amplitude-modulation (QAM) or a vestigial sideband (VSB) signal, using the same tuner. The tuner supplies a final IF signal in a 6 MHz frequency band, the lowest frequency of which is not appreciably more than 2.38 MHz. The final IF signal is digitized for synchrodyning to baseband, with the 2.375 MHz difference between the carrier frequencies of QAM and VSB signals being taken into account in the digital synchrodyning circuitry. The carrier frequencies of the QAM and VSB final IF signals are regulated to be submultiples of symbol frequency by applying automatic frequency and phase control signals developed in the digital circuitry to a local oscillator of the tuner. The presence of the pilot carrier accompanying a selected VSB HDTV signal is detected for automatically switching the radio receiver for operation in a VSB signal reception mode. The absence of pilot carrier accompanying a selected QAM HDTV signal is detected for automatically switching the radio receiver for operation in a QAM signal reception mode.

Patent
Tempaku Junya1
13 Jan 1994
TL;DR: In this paper, a data storage device having the capability of preventing unauthorized access to data stored therein, including a memory, is presented, where a comparison circuit coupled to the control circuit for comparing the internal passwords read from the first portion of the memory with external passwords received from the external device and for generating a comparison output signal indicative of whether respective ones of the internal and external passwords match.
Abstract: A data storage device having the capability of preventing unauthorized access to data stored therein, including a memory, e.g., a flash EEPROM, having a first portion for storing a plurality of internal passwords and a second portion for storing address data, e.g., encoded password addresses and status identification data, indicating the location of the internal passwords in the first portion, a control circuit responsive to an access request signal from an external device, e.g., a host computer, for reading the internal passwords from the first portion of the memory in accordance with the address data stored in the second portion of said memory, a comparison circuit coupled to the control circuit for comparing the internal passwords read from the first portion of the memory with external passwords received from the external device and for generating a comparison output signal indicative of whether respective ones of the internal and external passwords match and, an access permission signal generating circuit responsive to the comparison output signal for generating an access permission signal having first and second logic levels indicative of whether the external device is permitted or denied access to the data stored in the data storage device, respectively.

Patent
Gu S. Kim1
28 Mar 1994
TL;DR: In this paper, a process for manufacturing a thin profile semiconductor package by means of TAB (tape automated bonding) is described, where a barrier metal layer is formed on bonding pads formed on portions of a chip covered with insulating layers.
Abstract: A process for manufacturing a thin profile semiconductor package by means of TAB (tape automated bonding). A barrier metal layer is formed on bonding pads formed on portions of a chip covered with insulating layers. A photoresist layer is formed on the resultant structure, and patterned so as to expose the barrier metal layer, and then bumps are formed on the barrier metal layer as high as the photoresist layer. The semiconductor package is completed by bonding the bumps and inner lead portions of the TAB tape. The photoresist remains on the completed package as a permanent protective layer.

Patent
16 Aug 1994
TL;DR: In this paper, a zero voltage switching controller using a resonance mode converter, and an electronic ballast adopting the same, includes a power controller, a shutdown protection circuit and a brownout circuit, and performs switching when voltage of a switching element is zero.
Abstract: A controller for performing a zero voltage switching using a resonance mode converter, and an electronic ballast adopting the same, includes a power controller, a shutdown protection circuit and a brownout circuit, and performs a switching when voltage of a switching element is zero, thereby preventing excessive power consumption, enhancing efficiency and decreasing noise.

Patent
Kim Ill-Woong1, Si Don Choi1
27 Jun 1994
TL;DR: In this article, a lead frame is placed between the upper and under sockets by means of a plurality of pins penetrating the slot holes and guiding holes located at a periphery of the lead frame and then being inserted into the slot grooves.
Abstract: A die testing apparatus according to the present invention includes a lead frame having a plurality of die pads, wherein a plurality of bare chips are mounted on the die pads. The bonding pads of each bare chips are connected to a plurality of leads associated with each die pad through a plurality of bonding wires. The die pads are supported by a plurality of tie bars and the leads are supported by an adhesion tape attached to the lead frame. The lead frame is placed in a test socket which includes an under socket having a plurality of slot grooves and an upper socket hinged with the under socket and having a plurality of slot holes and a plurality of test probes contacting the leads of the lead frame. The lead frame is fixed between the upper and under sockets by means of a plurality of pins penetrating the slot holes and guiding holes located at a periphery of the lead frame and then being inserted into the slot grooves, and one side of the lead frame is caught between the upper and under sockets by a clamp. The test socket has a plug portion with electrical contacts thereon, which is located at an edge of the socket so that it can be plugged into a testing board.

Patent
24 Mar 1994
TL;DR: In this article, a digital radio receiver recovers in digital form a modulating signal that is at times subject to undesirable amounts of multipath distortion, which is applied as respective input signals to first and second finite-impulse-response (FIR) filters, each of which are adaptively weighted.
Abstract: In response to a received carrier wave modulated in accordance with a digital signal, a digital radio receiver recovers in digital form a modulating signal that is at times subject to undesirable amounts of multipath distortion This recovered modulating signal is applied as respective input signals to first and second finite-impulse-response (FIR) filters, each of an N-tap type, the taps of which are adaptively weighted The first FIR filter responds to the modulating signal to supply an output signal in which multipath distortion is suppressed The second FIR filter responds to the modulating signal to generate corrections for the tap weights of the first FIR filter, which corrections are generated more rapidly than can be done with a microprocessor of the type commonly known as a "digital signal processor" or "DSP" A digital comparator compares samples of the first FIR filter response to corresponding samples of an ideal response, thereby to generate updated tap weights for the second FIR filter

Patent
Ajay Krishnan1, Nalin Kumar
15 Aug 1994
TL;DR: In this paper, a maskless process for forming a protected metal feature in a planar insulating layer of a substrate is disclosed, and the metal feature is surrounded and protected by the first and second barrier materials.
Abstract: A maskless process for forming a protected metal feature in a planar insulating layer of a substrate is disclosed. A first barrier material is disposed in a recess in an insulating layer, a conductive metal is disposed on the first barrier material such that the entire metal feature is positioned within the recess below the top of the recess, a second barrier material is disposed on the metal feature such that the second barrier material occupies the entire portion of the recess above the-metal feature and extends above the top surface of the insulating layer, and the second barrier material is then polished until the top of the second barrier material is in and aligned with the top of the insulating layer. As a result, the metal feature is surrounded and protected by the first and second barrier materials, and the substrate is planarized.

Journal ArticleDOI
Myeong-Hwan Lee1, Jeong-Hoon Kim1, Jeong-Sang Lee1, Kyeong-keol Ryu1, Dong-Il Song1 
TL;DR: A new algorithm for interlaced to progressive conversion is proposed, referred to as a directional correlation dependent interpolation filtering (DIF) algorithm, which is composed of a correlation-dependent linear interpolation for a signal in the low horizontal frequency band and a line doubling method for a signals lying in the high horizontal frequencyband.
Abstract: Current TV systems suffer from uncomfortable visual artifacts such as edge flicker, interline flicker and line crawling, due to the inherent nature of the interlaced scanning process. Besides, the increasing demands of large TV screens have turned the problem of reducing visible line structures in a TV screen into an important issue. To lessen the visual affects of those artifacts, a technique known as an interlaced to progressive conversion (IPC) technique has been widely studied in various shapes. In the paper, the authors propose a new algorithm for interlaced to progressive conversion, referred to as a directional correlation dependent interpolation filtering (DIF) algorithm, which is composed of a correlation-dependent linear interpolation for a signal in the low horizontal frequency band and a line doubling method for a signal lying in the high horizontal frequency band. The DIF algorithm splits the horizontal frequency band of a given input 2D signal into two adjoint signals and applies two isolated interpolation schemes for the respective bands. In the algorithm, the authors develop a directional correlation dependent, interpolation technique depending on the spatial correlations between the spatially symmetric samples in the observation sliding window centered at the sample to be estimated. Computer simulations and the hardware implementation of the proposed algorithm to evaluate its performance are rigorously evaluated. The authors design a chip for luminance/chrominance interpolation with peaking process (YCIP) which has been tested with a real sequence of LDP images. >

Patent
01 Mar 1994
TL;DR: In this article, a read/write circuit generates internal addresses and timing for selecting sectors according to the external address and timing signals to control the read-out and rewrite of data between the sectors corresponding to the internal address and the buffer memories corresponding to sectors.
Abstract: To effect erase and program operations, i.e., rewrite of the non-volatile memory device efficiently with small electric power consumption and at high speed, a plurality of memory blocks that have a plurality of sectors and that each include a plurality of non-volatile memory cells are connected to buffer memories having at least the same memory capacity as a sector, and a read/write circuit generates internal addresses and timing for selecting sectors according to the external address and timing signals to control the read-out and rewrite of data between the sectors corresponding to the internal addresses and the buffer memories corresponding to the sectors, wherein the read/write circuit selects the sectors at timings shifted from one another and erases or programs the data in the selected sector in order to rewrite the data.

Patent
Kim Taesang1
04 Oct 1994
TL;DR: In this article, a cage in a piece of computing equipment with a rectangular opening in a surface of that equipment is adapted for having inserted therewithin a piece-of-paripheral equipment, where the hooked locking pins are springloaded and are twisted after their insertion so that their hooked portions engage with hooked catches located near the holes in the third side of the cage.
Abstract: A cage in a piece of computing equipment with a rectangular opening in a surface of that equipment is adapted for having inserted therewithin a piece of peripheral equipment with a rectangular front plate and with first and second guide rails located along its first and second sides, respectively, each having a circular hole of a prescribed diameter therethrough at prescribed distance from the front plate. The cage has first and second lead rails on first and second opposed sides thereof with which lead rails the first and second guide rails respectively engage. The lead rails each having a circular hole of the prescribed diameter therethrough to align with the hole in the guide rail it engages, when the inserted peripheral equipment is fully inserted. The cage has a third side extending between edges of its first and second sides, which third side has first and second holes therethrough of said prescribed diameter. Hooked locking pins have their shanks inserted through these holes and aligned holes in the lead and guard rails, for retaining the piece of peripheral equipment within the cage. The hooked locking pins are spring-loaded and are twisted after their insertion so that their hooked portions engage with hooked catches located near the holes in the third side of the cage.

Patent
04 Apr 1994
TL;DR: A display panel which ensures an optimum aperture efficiency by efficiently disposing of each signal line, switching device and pixel that form the display panel is proposed in this paper, where gate lines and inclined portions of data lines are respectively utilized as gate electrodes and source electrodes, and a hexagonal honeycomb-shaped structure may be used as the basic shape of pixels.
Abstract: A display panel which ensures an optimum aperture efficiency by efficiently disposing each signal line, switching device and pixel that form the display panel. Gate lines and inclined portions of data lines are respectively utilized as gate electrodes and source electrodes, and a hexagonal honey-comb-shaped structure may be used as the basic shape of pixels. Each drain electrode pattern of the switching devices has an inclined side equivalent to inclined portions of the data lines to increase the aperture efficiency and on-currents.

Patent
Back Dong-Cherl1
21 Jan 1994
TL;DR: In this paper, a television receiver capable of performing a video accompaniment function includes a television signal generator for receiving a TV signal and providing a video signal and an audio signal, a video amplifier for reading background/lyrics information and accompaniment information of a program selected among a plurality of programs stored in a memory.
Abstract: A television receiver capable of performing a video accompaniment function includes a television signal generator for receiving a television signal and providing a video signal and an audio signal, a video accompaniment signal generator for reading background/lyrics information and accompaniment information of a program selected tom among a plurality of programs stored in a memory, providing a video signal for accompaniment and an accompaniment signal, and generating a pseudo-sync signal, a first selector for selectively providing the video signal supplied from the television signal generator and the pseudo-sync signal supplied from the video accompaniment signal generator, a second selector for selectively providing the audio signal supplied from the television signal generator and the accompaniment signal supplied from the video accompaniment signal generator, a video output unit for receiving a signal selected from the first selector and the accompaniment video signal as a video output, an audio output unit for receiving a signal selected in the second selector as an audio output, and a controller for controlling respective elements according to the mode selection of television/video accompaniment. The television receiver is incorporated with the video accompaniment apparatus, thereby enhancing usage.

Patent
Deog-Kyoon Jeong1
31 Oct 1994
TL;DR: In this paper, a clock generating circuit generates 2n clocks, each having 1/2n frequency of a maximum baud rate of data bit stream input and a phase difference of π/n between successive phases thereof, and simultaneously shifts the phases on the clocks ahead or behind until the phases between the clocks and corresponding data bits of the data bit-stream input are locked in quadrature.
Abstract: A clock generating circuit generates 2n clocks (where n is a positive integer number) each having 1/2n frequency of a maximum baud rate of data bit-stream input and a phase difference of π/n between successive phases thereof, and simultaneously shifts the phases on the clocks ahead or behind until the phases between the clocks and corresponding data bits of the data bit-stream input are locked in quadrature, by comparing the phase of the clock with those of data bit-stream input and adjusting the phases of the clocks.

Patent
Sang-soo Kim1, Dong-Gyu Kim1, Yong-gug Bae1, Jong-in Choung1, Jun-ho Song1 
04 Mar 1994
TL;DR: In this paper, the first electrodes are driven independently from the scanning signal lines and the display signal lines, and are connected to each other between adjacent pixel portions by at least one wiring connecting portion.
Abstract: A liquid crystal display having an improved display characteristic and having a ring-structured storage capacitor of an independent wiring type wherein disconnection and/or short circuit defects are reduced and a method for manufacturing the same. The liquid crystal display has one or a plurality of first electrodes within each pixel region, for forming one or a plurality of auxiliary capacitors in conjunction with the opposing pixel electrode. The first electrodes surround the pixel electrodes in a ring type structure, and are connected to each other between adjacent pixel portions by at least one wiring connecting portion. The first electrodes are driven independently from the scanning signal lines and the display signal lines. Forming the first electrodes of the capacitors as independent wiring type having a ring structure simplifies the manufacturing process and utilizes the maximum pixel area. Also, the degree of freedom concerning the selection of the driving pulse signal of the liquid crystal display is improved to reduce the R-C delay.