Showing papers in "Circuit World in 2006"
TL;DR: In this paper, the authors present a methodology, including the algorithms, to quantify the risk of failure from tin whiskers and to present a dynamic risk trend based on the distribution of each of the whisker growth parameters, generated from experiments over a period of time.
Abstract: Purpose – To present a methodology, including the algorithms, to quantify the risk of failure from tin whiskers and to present a dynamic risk trend based on the distribution of each of the whisker growth parameters, generated from experiments over a period of time. This paper also aims to demonstrate the practical application of the methodology developed.Design/methodology/approach – This paper has been written to provide a methodology to assess tin whisker risk due to fixed whiskers in electronic products. The risk assessment process has been detailed in the paper. To demonstrate the usefulness of the methodology, a tin whisker risk assessment was conducted for a printed circuit board (PCB) in operation.Findings – Based on the experimental tin whisker growth data it is observed that growth rates of mean length and average density decrease with time. Based on the risk assessment, it was estimated that for the common matte tin over copper finish, the failure risk for the circuit card assembly was 4 per cen...
25 citations
TL;DR: In this paper, the authors give an overview about market trends and driving forces of halogen-free materials for PCB applications, including new halogenfree raw materials developed to meet the market demand, and explain why there is a discussion about FR and what is driving the market to environmentally friendly products.
Abstract: Purpose – To give an overview about market trends and driving forces of halogen‐free materials for PCB applications. The paper also includes an overview about new halogen‐free raw materials developed to meet the market demand.Design/methodology/approach – The paper does not intend to deal with scientific aspects, i.e. whether halogenated flame retardants (FR) are bad or not. The goal of this paper is to explain why there is a discussion about FR and what is driving the market to environmentally friendly products.Findings – Halogen‐free technology has been evolving for more than 15 years, but it has only gained significance in the past three to four years. It developed from a marketing concept to a real market (although still considered as niche), where the products offered can now meet demand. The paper explains the background to halogen‐free and the motivation for OEM's to switch to halogen‐free, as well as giving an overview of the current status.Originality/value – Provides a market and technology revi...
13 citations
TL;DR: In this paper, the use of conductor spacings below 4 mil in printed wiring boards (PWBs) can introduce an unanticipated failure mechanism, leading to current leakage and short circuit failure.
Abstract: Purpose – To show how the use of conductor spacings below 4 mil in printed wiring boards (PWBs) can introduce an unanticipated failure mechanism, leading to current leakage and short circuit failure.Design/methodology/approach – The tests in this study were conducted in accordance with IPC‐TM‐650 2.6.25, using boards designed with conductor spacings between plated through holes (PTHs) ranging from 6 to 3 mil and from 8 to 3 mil between PTHs and ground planes. The board types and conductor spacings were selected to include current and future printed circuit board fabrication technology.Findings – For PWBs that may be used in harsh environments where the relative humidity and temperature may approach those of the test environments, even for relatively short periods of time, spacings of 4 mil or less in the materials tested may not be appropriate. However, it is unlikely that the 85°C and 85 percent RH conditions are the minimum conditions to induce this failure mechanism. More tests at lower temperatures an...
13 citations
TL;DR: In this article, an overview of the mechanisms by which brominated flame retardants (BFRs) used in the electronics industry enter, and are transported, in the environment is given.
Abstract: Purpose – To give an overview of the mechanisms by which brominated flame retardants (BFRs) used in the electronics industry enter, and are transported, in the environment. The potential impacts of BFRs on living organisms are also outlined.Design/methodology/approach – The paper provides an explanation of the environmental issues and impacts on living organisms of BFRs that are used extensively in electrical and electronic applications. It is compiled using information from examples of the published literature and seeks to give an explanation for the increasing pressure on the electronics industry to limit the use of BFRs and to introduce non‐halogenated alternatives.Findings – Despite typically being incorporated into thermoplastic and thermosetting polymers, BFRs have been found to enter the environment and to accumulate in regions of the world. The mechanisms by which this migration can occur are complex and influenced by a wide variety of factors. However, such migration has lead to BFRs being found ...
12 citations
TL;DR: In this paper, the main impacts on the measured peel strength numbers in the IPC-TM-650 peeling test were investigated and it was shown that copper adhesion to laminating resin is insufficiently described by peel strength data because of the impacts of foil thickness, stiffness on bending (physical bending work, stress distribution underneath the peeling line) and the treatment roughness.
Abstract: Purpose – Peel strength numbers are part of a laminate's specifications and should characterize the specific bond performance (copper adhesion) under test conditions. Unfortunately, from both a theoretical and a practical point of view they are not able to do that. This study seeks to address this issue.Design/methodology/approach – This paper has been written to show the main impacts on the measured peel strength numbers in the IPC‐TM‐650 peeling test. From an extensive database regarding peel numbers for diverse foil types, foil thicknesses and treatment roughnesses it is possible to show the influence of prepreg type, foil thickness and roughness on the measure peel strength.Findings – Copper adhesion to laminating resin is insufficiently described by peel strength data because of the impacts of foil thickness, stiffness on bending (physical bending work, stress distribution underneath the peeling line) and the treatment roughness. The latter works reinforcing regarding the (low) resin strength and thi...
11 citations
TL;DR: In this article, the relationship between intermetallic compound (IMC) formation and solderability for immersion tin deposit under different number of reflows was investigated, and it was shown that longer reflow times during the assembly process or use of a thicker tin layer can improve the solderability after three reflow cycles.
Abstract: Purpose – To investigate the relationship between intermetallic compound (IMC) formation and solderability for immersion tin deposit under different number of reflows.Design/methodology/approach – Scanning Auger microscopy and X‐ray photoelectron spectrometer surface analysis techniques were used to study changes in immersion tin deposit layer when subjected to simulated solder reflow conditions.Findings – Auger analysis also showed that no three discrete uniform layers of pure tin, Cu6Sn5η‐phase and Cu3Sn e‐phase can be observed after one reflow. Degradation in solderability performance after reflow was due to the formation of a Cu6Sn5 IMC at the surface. This IMC has inferior solder wetting properties compared to tin. As the number of reflow cycles increases the surface contains less tin rich regions and more IMC regions. Experiments showed that longer reflow times during the assembly process or use of a thicker tin layer can improve the solderability after three reflow cycles.Research limitations/impli...
10 citations
TL;DR: In this article, a new tin plating process which provides deposits having a fine-grained structure and stable crystal orientation with a combination of properties which are well suited for use as a lead-free finish on semiconductor lead-frames was presented.
Abstract: Purpose – To present a new tin plating process which provides deposits having a fine‐grained structure and stable crystal orientation with a combination of properties which are well suited for use as a lead‐free finish on semiconductor lead‐frames.Design/methodology/approach – The new process was designed to produce tin coatings with a deposit grain size ca 20 per cent that of a traditional matte pure tin finish to ensure that the deposit retains good solderability after steam ageing.Findings – The enhanced solderability from the finer‐grained deposit has been demonstrated and other functionally important deposit properties have been confirmed. A stable single crystal orientation 〈220〉 indicates low whiskering propensity and measurements have confirmed the excellent whisker performance, even without specific whisker‐preventing countermeasures. The deposit has high ductility. Analytical methods are available for all key components to ensure optimum process control. The process has been tested in a continuo...
9 citations
TL;DR: A review of the history of conductive anodic filament (CAF) from its identification in the 1970s to the statistical analysis of its failure mode and the factors that enhance its formation can be found in this paper.
Abstract: Purpose – Conductive anodic filament (CAF) is a failure mode in printed wiring boards (PWBS), which occurs under high humility and high voltage gradient conditions. This paper aims to review the history of CAF from its identification in the 1970s to the statistical analysis of its failure mode and the factors that enhance its formation.Design/methodology/approach – Charts the chronology and details the developments of CAF over the last 30 years.Findings – CAF is a conductive copper‐containing salt created electrochemically that grows from the anode toward the cathode sub‐surface along the epoxy/glass interface. It can also grow from the anode on one layer to a cathode on another. CAF was first discovered in 1976 and was identified as a catastrophic failure mode. It is enhanced by high humidity during storage or use, by high voltage gradient between anode and cathode, by certain soldering flux ingredients, by hole drilling, multiple thermal cycles during processing, and by higher processing temperatures as...
9 citations
TL;DR: In this article, the development of flex-rigid circuit board construction techniques from the first applications to the current status of a modern interconnection system is discussed, showing that the demand for complex interconnection solutions is rising with the increased level of integration of more functions into electronic devices and that wiring and interconnection must be cheap, reliable, light in weight and must fit into very small housings.
Abstract: Purpose – Seeks to answer the question: have the reasons for using flex‐rigid circuit boards changed through the years?Design/methodology/approach – The paper presents the development of flex‐rigid circuit board construction techniques from the first applications to the current status of a modern interconnection system. The paper discusses that it was the military and avionic industry that in the past required an interconnection technique that was reliable under environmental stress but compact and lightweight. Today it is the automotive and communication industry that is driving the development of printed circuit board technology.Findings – Finds that wiring and interconnection must be cheap, reliable, light in weight, and must fit into very small housings. The demand for complex interconnection solutions like the flex‐rigid circuit technique is rising with the increased level of integration of more functions into electronic devices. The reasons for using flex‐rigid circuitries are nearly still the same ...
9 citations
TL;DR: In this paper, a submodeling technique is incorporated in a finite element analysis to investigate the stress state of blind vias of different structural configurations, and the potential of fracturing on the blind via is examined.
Abstract: Purpose – The submodeling technique is incorporated in a finite element analysis to investigate the stress state of blind vias of different structural configurations.Design/methodology/approach – The test vehicle is a multi‐chip module plastic ball grid array comprised of a four‐layer build‐up substrate. The calculated displacement field from the global model for the entire package is interpolated on the boundaries of the submodel, which involved the detailed structure of a blind via structure. Through the analysis, the potential of fracturing on the blind via is examined.Findings – From the analysis it was found that filled blind vias in general have a smaller potential for delamination compared to the unfilled ones. Moreover, symmetric blind via layouts with a blind via located at the center of the through hole appear to be the most appropriate design for this particular test vehicle.Originality/value – The value of the paper lies in its ability to provide insights into the prevention of fracturing of b...
8 citations
TL;DR: In this article, the influence of temperature on the electroplating efficiency of various metals from ionic liquids was studied, including copper, silver, nickel, tin, and copper chlorides, in the form of metal chlorides.
Abstract: Purpose – To study the influence of temperature on the electroplating efficiency of various metals from ionic liquids.Design/methodology/approach – Copper, silver, nickel and tin, in the form of metal chlorides, were dissolved in a number of ionic liquids. After using cyclic voltammetry to establish an optimum current density to electroplate each metal, basic electroplating processes were carried out at varying temperatures onto stainless steel. The mass deposited was used to calculate the efficiency of the process.Findings – It was found that, generally, temperature influences the efficiency of electroplating from ionic solutions. While some solutions showed continuing improvements in plating efficiency as the temperature increased, others exhibited an optimum plating temperature. One solution examined showed the need for a certain temperature to be reached in order to induce the formation of a different metal complex before electroplating was achievable.Research limitations/implications – The low curren...
TL;DR: In this article, the types of commercially available catalytic anodes and their electrochemical properties, particularly with respect to acid copper electroplating, were reviewed and compared with the preferred soluble anodes.
Abstract: Purpose – Insoluble anodes have long been used as an alternative to the preferred soluble types, primarily for their practicality and without great attention to their efficacy. However, since about 1970 so‐called catalytic anodes, typified by platinised titanium, have been increasingly used for electrochemical processes without too much attention to possible side‐effects. The purpose of this paper is, therefore, to review the types of commercially available catalytic anodes and their electrochemical properties, particularly with respect to acid copper electroplating.Design/methodology/approach – Commercially available catalytic anodes were obtained from various anode suppliers and their electrochemical properties and behaviour with respect to acid copper electroplating were studied.Findings – While the oxidising capability of catalytic anodes is undisputed, it can lead to oxidation of organic species in electroplating solutions. This in turn can lead to loss of control and additional costs for additives i...
TL;DR: In this article, a lumped element model of the integrated inductor is proposed and an analytical approach is used to extract the parameters in the model, which can be extracted from the geometry of the inductor.
Abstract: Purpose – To investigate the fabrication of integrated inductors on a liquid crystal polymer (LCP) substrate. To analyze the RF performance of the integrated inductors.Design/methodology/approach – Fabrication of integrated inductors on a LCP substrate using an MCM‐D/L technique. A lumped element model of the integrated inductors is proposed. An analytical approach is used to extract the parameters in the model.Findings – Integrated inductors on a LCP substrate have been fabricated using an MCM‐D/L technique. The conductor loss of the thin microstrip lines is the major factor degrading the Q‐value of the integrated inductors. A lumped element model of the integrated inductor is proposed. The parameters of the lumped element model can be extracted from the geometry of the integrated inductor. Further work will focus on increasing the conductor thickness from 500 nm to 5 μm.Originality/value – The value of the paper lies in its description of the integration of inductors on a LCP substrate. It also describe...
TL;DR: In this article, the authors introduce the four key industry roadmaps used by the electronics industry and illustrate which parts of the supply chain each serves, and highlight the different technology areas and sections of the industry value chain addressed by the four main roadmaps.
Abstract: Purpose – To introduce the four key industry roadmaps used by the electronics industry and to illustrate which parts of the supply chain each serves.Design/methodology/approach – A comparison of the coverage of the iNEMI, ITRS, Jisso and IPC roadmaps.Findings – It is apparent that the four key industry roadmaps do serve the supply chain and their respective industries. The roadmaps do not compete but rather, they actually complement each other and give the reader who understands them, a picture of the industry and its supply chain that is not available anywhere else.Research limitations/implications – The four key industry roadmaps provide comprehensive coverage for the electronics industry.Originality/value – The paper highlights the different technology areas and sections of the electronics industry value chain addressed by the four key industry roadmaps.
TL;DR: In this paper, the electroless flash gold plating bath was used for the direct gold on copper surface finish, which is suitable for soldering for both leaded solder and lead-free solders.
Abstract: Purpose – To report on research on the alternative surface finish “direct gold on copper”, including reaction mechanism, methods of deposition and end uses.Design/methodology/approach – Examines the deposition reaction of the electroless flash gold plating bath, and the effects of the copper surface roughness and deposition time on the deposit and solderability characteristics.Findings – Direct immersion gold is only partially immersion and mostly electroless in deposition mode. The surface is applicable to soldering for both leaded solder and lead‐free solders. The surface is also wire bondable.Originality/value – The paper offers details of a new alternative surface finish for use in printed circuit board fabrication as well as in packaging applications. The paper shows the electroless deposition mode of the process. The finish is ideally suited where Rf losses must be minimized. It is suitable for soldering as well as for wire bonding.
TL;DR: In this paper, the authors present and discuss open trace defects uncovered in an FR4 assembly during electrical testing, and analyze the distribution of defects observed in FR4 assemblies and discuss possible root causes for their occurrence.
Abstract: Purpose – To present and discuss open trace defects uncovered in an FR4 assembly during electrical testing.Design/methodology/approach – This paper presents open trace defects observed in FR4 assemblies and analyses the distribution of defects. The paper also discusses possible root causes for their occurrence.Findings – The open trace defects that occurred during printed circuit board (PCB) fabrication should have been observed by the board manufacturer. It appears that the PCB manufacturer did not perform automatic optical inspection (AOI) and electrical testing during the manufacturing of the boards. The cost due to the rejected PCBAs was approximately 3x times that of the PCB cost.Originality/value – The paper highlights the costly impact of uncovering a PCB defect after assembly. Based on the results of this study, the implementation of electrical testing and AOI for PCBs is recommended.
TL;DR: In this paper, the optical performance of organic multi-mode optical waveguides integrated with printed circuit board (PCB) and demonstrated the feasibility of 2.5 and 10 GHz optical interconnection in board level, respectively.
Abstract: Purpose – To characterise the optical performance of organic multi‐mode optical waveguides integrated with printed circuit board (PCB) and to demonstrate the feasibility of 2.5 and 10 Gbps optical interconnection in board‐level, respectively.Design/methodology/approach – This paper provides both qualitative and quantitative approaches for the characterization the wave guide performance, i.e. using loss measurement, optical beam profiling, ethernet verification, and eye‐diagram testing. In addition to wave guide loss measurement, the most significance part of the work reported in this paper is to evaluate optical wave guides with coupled VCSELs, by which a 3 dB coupling design budget can thus be identified. Furthermore, by artificially manipulating coupling conditions, practical concerns of EOPCB integration, including waveguide geometry, VCSEL driving power, alignment tolerance, coupling spacing, etc. are studied.Findings – Thermal stability studies related to PCB lamination processes show the feasibility...
TL;DR: In this article, an overview of the key issues that need to be addressed when manufacturing PCBs in China for the European market is given. But the focus is on PCB fabrication.
Abstract: Purpose – To give an introductory overview of the key issues that need to be addressed when manufacturing PCBs in China for the European market.Design/methodology/approach – The paper gives an overview of key issues impacting manufacturers supplying printed circuit boards into Europe. The demand for higher performance and the need to comply with legislation such as the European RoHS Directive are posing significant challenges for non‐European fabricators. The paper introduces some of the key issues including materials substitution, the move to lead‐free assembly and new laminate requirements in the context of increasingly stringent quality and performance criteria.Findings – Low cost manufacturers in China supply a large proportion of the PCBs used by the European electronics industry. If this supply is to continue as board complexities and performance requirements increase, PCB fabricators will need to pay careful attention to a wide range of issues including European legislation, choice of laminates, re...
TL;DR: In this article, the compatibility of currently available laminate materials for lead-free assembly is discussed and problem areas are highlighted and methods for choosing each type of material for compatibility with leadfree soldering process are described.
Abstract: Purpose – The lead‐free soldering process has been confounding the PWB fabricators when they set out to select the right materials for lead‐free soldering. This paper discusses the compatibility of currently available laminate materials for lead‐free assembly.Design/methodology/approach – This paper has been written to provide a review of material characteristics. Problem areas are highlighted and methods for choosing each type of material for compatibility with lead‐free soldering process are described.Findings – When lead is banned and taken out of the traditional tin‐lead solder, there are other metal alternatives to alloy with tin such as silver, bismuth, copper, and zinc, etc. The melting point of these lead‐free alloys is higher than the conventional tin‐lead solder. Consequently, the reflow temperature of the lead‐free solder can now reach 240‐250°C. As the reflow temperature is elevated, it will pose a severe reliability challenge to the laminate materials. The compatibility of currently available...
TL;DR: In this paper, the problems that can occur with base laminate materials when converting to lead-free soldering and the corrective actions that need to be taken with base materials are described.
Abstract: Purpose – To give an overview of the problems that can occur with base laminate materials when converting to lead‐free soldering and to give guidance on possible solutions.Design/methodology/approach – The paper contains a number of correlations between different physical measurements and their impact on real‐life processing conditions. The problem areas are highlighted and the corrective actions that need to be taken with base materials are described.Findings – Results suggest that conventional FR4 resins might still be suitable for standard lead‐free applications that require only a few reflow cycles. However, with the growing complexity of board designs and the increasing number of solder cycles, better thermally resistant products are necessary. Other key resin parameters such as adhesion or toughness are also essential to enhance reliability.Originality/value – The value of the paper lies in its provision of guidance on critical base material properties. It describes the change in physical properties...
TL;DR: In this article, the main needs of PCB manufacturers and how these needs can be met using laser direct imaging (LDI) technology are discussed and the methods for solving these issues using LDI technology are described.
Abstract: Purpose – To give an overview of the main needs of PCB manufacturers and to show how these needs can be met using laser direct imaging (LDI) technology.Design/methodology/approach – This paper has been written to provide a review of current needs of PCB manufacturers in different product types. Problem areas are highlighted and methods for solving these issues using LDI technology are described.Findings – Demand for LDI machines is increasing globally. Enhancements in LDI technology capabilities are convincing more PCB companies to the technology in today's production. HDI can address the needs of different applications such as: quick turnaround and sampling jobs that require short delivery times while meeting high technological demands; high layer count jobs that require accurate layer to layer alignment; flex and rigid‐flex boards with challenging registration and exposure uniformity demands; and sequential build‐up boards that require very accurate pad to hole registration, etc.Originality/value – The ...
TL;DR: In this paper, the authors describe the processes for wet etch fabrication of single mode rib waveguides including compact crystal plane turning mirrors, which are fabricated on glass substrates by conventional photolithography using SU8 polymer and tested for attenuation.
Abstract: Purpose – To detail results of research into optical waveguides fabricated from silicon on insulator (SOI) for on‐chip high speed applications and from polymer for more general applications.Design/methodology/approach – This paper shows the processes for wet etch fabrication of SOI single mode rib waveguides including compact crystal plane turning mirrors. Losses for the mirror facets are determined by difference measurements. Multimode polymer strip waveguides are fabricated on glass substrates by conventional photolithography using SU8 polymer and tested for attenuation.Findings – Fabrication of compact turning mirrors for silicon waveguides requires precise alignment of masks and controlled etching of the corner facets in order to obtain correct alignment of the mirror face with the incoming and outgoing waveguides. Measurements of losses per mirror facet show typical losses of 1‐2 dB/facet. Suggestions for improvements are made. Preliminary results for polymer waveguides show the necessity for high qu...
TL;DR: In this paper, the impact of oxide and oxide alternative processes on signal loss in commercial RF applications was examined, and the line loss for each treatment and rework condition was charted to nearly 20 GHz.
Abstract: Purpose – To examine the impact of oxide and oxide alternative processes on signal loss in commercial RF applications.Design/methodology/approach – Stripline conductors were formed using traditional oxide, oxide dissolution/reduction, and oxide alternative processes. Conductor geometry was measured and surface topography was characterized. Effective dielectric constants and characteristic impedance for each system was determined. Finally, line loss for each treatment and rework condition was charted to nearly 20 GHz. Electrical measurements were performed by taking S‐parameter measurements through 20 GHz using an agilent vector network analyzer (VNA).Findings – The methods employed were sufficient to statistically characterize the increased loss associated with thick oxides and high‐microetch oxide alternatives. Lower etch oxide alternatives yielded benefits for signal integrity. Of importance, rework procedures gave unacceptable increases in line loss. Overall, however, the loss due to innerlayer bonding...
TL;DR: In this paper, a solution for effective thermal management for high-speed electronic packaging for spacecraft applications through dual metal core MLBs was realized, which can solve heat dissipation as well as CTE issues.
Abstract: Purpose – Realising a solution for effective thermal management for high‐speed electronic packaging for spacecraft applications through dual metal core MLBs.Design/methodology/approach – Highlights fabrication issues and describes corrective actions.Findings – Dual metal core MLBs can solve heat dissipation as well as CTE issues in high‐speed electronic packaging for spacecraft applications. Optimisation of the processes were done to sort out various problems encountered in the fabrication stages.Originality/value – The paper projects the advantages of dual metal core MLBs over traditional heat sinks and centralized single metal core MLBs. It also helps in simplifying the fabrication processes to avoid the various bottlenecks observed.
TL;DR: In this paper, the impact on the nickel plating industry of reduced nickel OELs and environmental quality standards (EQS) was investigated in the UK and the results showed that most companies could comply with a reduced maximum exposure limit (MEL) for soluble nickel of 0.05 µg Ni/m3.
Abstract: Purpose – Metallic nickel and four nickel compounds are undergoing a risk assessment in the European Union. The outcomes of this risk assessment may be used for a revision of existing or introduction of new occupational exposure limits (OELs) and environmental quality standards (EQS). This study aimed at determining the impact on the nickel plating industry of reduced nickel OELs and EQS, these should be proposed in the future.Design/methodology/approach – Seven companies involved in nickel plating were visited. These companies were selected to provide a reasonable cross‐section of the UK nickel plating industry.Findings – Concerning occupational exposure it would appear that most companies could comply with a reduced maximum exposure limit (MEL) for soluble nickel of 0.05 mg Ni/m3. There is a need to be better informed on the state‐of‐the‐art monitoring methods for airborne nickel species in the workplace. Companies need to be encouraged to start measuring their workplace exposure levels to build up a re...