Showing papers in "IEEE Journal of Solid-state Circuits in 1969"
TL;DR: In this article, an analog shift register (ASR) is presented, where the charge transfer is carried out by active elements located between the storage elements and controlled by a clock signal.
Abstract: Deals with integrated analog shift register circuits. Analog information is stored in arrays or mosaics of very small capacitors and can be made to travel through the arrangement by charge transfer. The charge transfer is carried out by active elements located between the storage elements and controlled by a clock signal. The circuit presented is simple, feasible for integration, and suitable for various functions. Delay, time-axis conversion, and scanning are the most obvious applications. This first report is restricted to a description of basic principles, examples of integrated concepts, and a brief discussion of fields of application.
129 citations
TL;DR: The first part of this paper deals with the basic photodiode unit, its principle of operation, and the factors that affect thePhotodiode and array sensitivity.
Abstract: The first part of this paper deals with the basic photodiode unit, its principle of operation, and the factors that affect the photodiode and array sensitivity. Experimental results of the planar Si p/sup +/-n photodiode are presented. Design and layout considerations including the integration time are also given. The second part of this paper deals with scanning of photodiode arrays. Detail design considerations are given for a static MOST ring counter. A dynamic shift register with clocked loads for integral scanning is also considered. Design considerations of a realized photosensing matrix with integral scanning are given. Finally, scanning problems of large arrays are briefly considered.
115 citations
TL;DR: It is found that for high-frequency operation, the current-switching system using simple epitaxial transistors provides the highest output power with least likelihood of transistor failure, although with a somewhat lower efficiency than the voltage-switch.
Abstract: The transition and saturation loss mechanisms of the two basic tuned Class-D amplifiers are studied in detail, as functions of drive waveform, signal frequency, and type of transistor. The charge control approach is used to derive optimum drive waveforms, together with approximate expressions for the various contributions to transition time that are verified experimentally. It is found that for high-frequency operation, the current-switching system using simple epitaxial transistors provides the highest output power with least likelihood of transistor failure, although with a somewhat lower efficiency than the voltage-switch. The voltage-switching system is found to be preferable when simple epitaxial transistors are not used. An example is given of a current-switching amplifier designed to deliver a continuous power of 1 kW at 500 kHz with an overall system efficiency of greater than 90 percent into a variable load.
91 citations
TL;DR: The characteristics of recently developed integrated-circuit components are reviewed and some new devices are described and their impact on the design of monolithic operational amplifiers is discussed.
Abstract: The characteristics of recently developed integrated-circuit components are reviewed and some new devices are described. Their impact on the design of monolithic operational amplifiers is also discussed. Emphasis is placed on realizing particularly good dc characteristics-especially low input current. However, techniques for obtaining higher operating speeds are also covered.
76 citations
TL;DR: In this paper, a single unity gain amplifier, two resistors (R/SUB 1, R/SUB 2), and a capacitor (C) were used for realization of a grounded inductor for integrated circuits.
Abstract: A circuit consisting of a single unity gain amplifier, two resistors (R/SUB 1/,R/SUB 2/), and a capacitor (C) is presented for realization of a grounded inductor for integrated circuits. The circuit behaves as an inductor with inductance L=CR/SUB 1/R/SUB 2/ and maximum Q/SUB 0/=(R/SUB 1//R/SUB 2/)/SUP 1/2//2. Experimental results agree closely with the theoretical calculations.
73 citations
TL;DR: A technique of periodically switching filter networks makes continuously variable filter parameters possible; at the same time capacitor or time-constant multiplication is obtained.
Abstract: A technique of periodically switching filter networks makes continuously variable filter parameters possible; at the same time capacitor or time-constant multiplication is obtained. With this method the time constants are multiplied by the switching period to switch aperture-time ration. Because the aperture time is usually small compared to the switching period, the active elements can be shared. A typical first-order system is analyzed for its step and sine response by the difference equation method. Phase and gain error expressions are established as a function of the various parameters. Limiting cases are then investigated to give a measure of a pulse- switched system performance. Finally an application of a multiplexed system is presented where three independent transfer functions are realized using one operational amplifier.
55 citations
TL;DR: In this article, a nonlinear frequency-dependent model for the transistor and with Volterra series as an analysis tool was used to determine the optimum cascade that has high gain and good modulation performance especially for higher frequencies.
Abstract: Intermodulation distortion performance of cascaded transistors is analyzed using a nonlinear frequency-dependent model for the transistor and with Volterra series as an analysis tool. The objective of this study is to determine the optimum cascade that has high gain and good modulation performance especially for higher frequencies. A particular application is in long-haul, analog, solid-state coaxial systems where intermodulation distortion is a critical problem. Both experimental as well as computer results are used in this analysis. It is shown, for example, that certain low distortion configurations can exhibit high distortion when cascaded. A few optimum cascade configurations are discussed in detail.
45 citations
TL;DR: The practical realization in gyrator-C form of a seventh-order Cauer-parameter low-pass filter with 40-dB stopband attenuation is described, showing the inherent suitability of gyrATOR-C filters for integration.
Abstract: The practical realization in gyrator-C form of a seventh-order Cauer-parameter low-pass filter with 40-dB stopband attenuation is described. The three floating coils of the equivalent LC filter were replaced by capacitor-loaded semi-floating gyrators. The gyrators were realized in hybrid form using thick-film resistors. The performance of the filter over a temperature range from -40/spl deg/ to +61/spl deg/C was very satisfactory, without any attempt at temperature compensation being made. This, together with the wider allowable element tolerances (compared with other active RC filter methods) shows the inherent suitability of gyrator-C filters for integration. Also in this paper some of the special problems and characteristics of gyrator-C filters are theoretically discussed, in particular the realization of gyrators with floating ports, gyrator Q-enhancement, and component tolerances in gyrator-C filters.
34 citations
TL;DR: This paper is a condensed survey of design principles that make use of the advantages offered in monolithic structures: close matching and tracking of parameters, control over component geometries, and the availability of a large number of active devices at little extra cost.
Abstract: The components available in integrated circuits are well known for their large tolerances and temperature coefficients. This paper is a condensed survey of design principles that make use of the advantages offered in monolithic structures: close matching and tracking of parameters, control over component geometries, and the availability of a large number of active devices at little extra cost. With these techniques it is, in many cases, possible to duplicate or even exceed the performance of discrete component linear circuits.
33 citations
TL;DR: A computer-aided circuit-simulation method is developed to enable the design, characterization, and optimization of MOS integrated circuits and it is demonstrated that any MOS circuit configuration can be analyzed in terms of an equivalent inverter.
Abstract: A computer-aided circuit-simulation method is developed to enable the design, characterization, and optimization of MOS integrated circuits. The computation of dc and transient characteristics is done in terms of physical device parameters extracted from processing information and incorporated in an analytical device model. It is demonstrated that any MOS circuit configuration (with its associated series resistances and parasitic devices) can be analyzed in terms of an equivalent inverter. Input-output transfer characteristics are obtained by superposition of the load and transistor I-V characteristics, providing the necessary information for dc > `worst-case' design. A simple device model was used to compute circuit transient response. All the computed characteristics are in good agreement with measurements performed on integrated circuits.
27 citations
TL;DR: The probability of array yield for a large-scale integrated memory array is considered and the most efficient use of redundancy is to have more row or column redundancy along the longer dimension of the array.
Abstract: The probability of array yield for a large-scale integrated memory array is considered. The calculation assumes the random distribution of defective cells and the discretionary wiring of good rows and columns. Under the above conditions, the calculation shows that the most efficient use of redundancy is to have more row or column redundancy along the longer dimension of the array.
TL;DR: A system-oriented approach to the design of inductorless tuned integrated circuits is described, which uses the phase-locked loop (PLL) techniques to obtain the desired tuning and interference-rejection characteristics.
Abstract: A system-oriented approach to the design of inductorless tuned integrated circuits is described. This design method uses the phase-locked loop (PLL) techniques to obtain the desired tuning and interference-rejection characteristics. The PLL approach does not require tight control of component tolerances, and offers a higher selectivity and frequency capability than the corresponding active-RC synthesis methods. In this paper, basic design parameters for phase-locked integrated circuits are given, and two separate design examples are described. First is a high- frequency (1 to 25 MHz) FM amplifier/detector, which forms a monolithic replacement for the IF strip and the detector sections of a conventional FM receiver or TV sound system. The second is an integrated FM multiplex receiver for multi-channel telemetry applications, which has the selectivity of a 6-pole bandpass filter and can be tuned by means of an external resistor or capacitor from a fraction of a cycle to over 300 kHz.
TL;DR: Acceptable limits for mismatch between devices were derived based on circuit considerations and were related to process variables, and feasibility of the technology has been shown.
Abstract: The desirable characteristics of complementary MOS circuits are low standby power consumption, high speed, and high noise immunity. These require close control and matching of n- and p-channel transistor characteristics. Acceptable limits for mismatch between devices were derived based on circuit considerations and were related to process variables. Predicted performances were achieved using test circuits; feasibility of the technology has been shown. The reliability of fabricated test structures was evaluated.
TL;DR: In this article, a simple coaxial circuit has been designed for use with the high-power anomalous-mode avalanche diodes, and the frequency of oscillation is continuously tunable from 1.0 to 1.5 GHz with variations in output power of approximately 1 dB.
Abstract: A simple coaxial circuit has been designed for use with the high-power anomalous-mode avalanche diodes. Pulsed powers of over 100 watts with efficiencies of 25 to 30 percent are typically obtainable from single chips and as much as 180 watts at 40 percent efficiency has been achieved. The frequency of oscillation is continuously tunable from 1.0 to 1.5 GHz with variations in output power of approximately 1 dB. It has been demonstrated that the circuit must be capable of supporting higher order harmonics of the fundamental anomalous-mode oscillations for proper operation. The simplicity of tuning and the consistency with which these diodes can be fabricated indicates that in the near future these devices may play a role in practical systems.
TL;DR: Transistors with current gains of 2000 to 10000 at collector currents less than 1 /spl mu/A can now be made in monolithic circuits, more than ten times the gain of present-day discrete transistors.
Abstract: Transistors with current gains of 2000 to 10000 at collector currents less than 1 /spl mu/A can now be made in monolithic circuits. This is more than ten times the gain of present-day discrete transistors. The significance of this breakthrough is greatest for IC operational amplifiers as lower input bias currents are constantly being sought. Circuit techniques are available, namely bootstrapping and cascade connections, that take advantage of the high-current gain of one transistor type and the high-breakdown voltage of the second, producing the equivalent of a high gain, high-voltage device. This may double the number of transistors needed to perform a given function, but it is an economical approach for monolithic IC's as active devices have a relatively low cost.
TL;DR: An S-band CW power source consisting of transistor-amplifier-driven varactor-doubler chains fabricated in hybrid integrated form is described, which has good heat sinking and low parasitic reactance and which permits direct paralleling of transistors.
Abstract: An S-band CW power source consisting of transistor-amplifier-driven varactor-doubler chains fabricated in hybrid integrated form is described. The source employs a microstrip package for high-power transistors, which has good heat sinking and low parasitic reactance and which permits direct paralleling of transistors. A breadboard model of the power source consisting of hybrid integrated components interconnected by coaxial lines produced a CW output of 9.8 watts at 3000 MHz with a 1-dB bandwidth of 6.7 percent and a dc to RF efficiency ranging from 9 to 14.5 percent over the band. The required RF input power to the module was 600 mW centered at 1500 MHz.
TL;DR: A generalized set of equations has been developed for the multiple collector and multiple emitter transistors that are applicable to the lateral transistors, SCR's, and the T/SUP 2/L coupling transistors and shows how a nonuniform base layer can increase the alpha of the lateral transistor and decrease the current drain to the substrate.
Abstract: A generalized set of equations has been developed for the multiple collector and multiple emitter transistors. These equations are applicable to the lateral transistors, SCR's, and the T/SUP 2/L coupling transistors. The analysis shows how a nonuniform base layer (double-epitaxial structure) can increase the alpha of the lateral transistor and decrease the current drain to the substrate and decrease the current drain to the substrate. The analysis also shows that in a T/SUP 2/L gate the inverse alpha is nearly equal to the cross-coupling current ratio, and can be reduced by increasing the number of inputs.
TL;DR: A novel method of measuring driving-point and transfer impedance over a wide spectrum rapidly and with good accuracy uses a digital computer to transform the pulse response of a network into the frequency domain and a sampling oscilloscope provides the time transformation needed for data acquisition.
Abstract: A novel method of measuring driving-point and transfer impedance over a wide spectrum rapidly and with good accuracy uses a digital computer to transform the pulse response of a network into the frequency domain. A sampling oscilloscope provides the time transformation needed for data acquisition. The method and laboratory technique are discussed. Experimental data show agreement within 12 percent between the data from a single pulse measurement and bridge measurements over a band of 40 harmonic frequencies, i.e., 25-1000 MHz. Fundamental accuracy and bandwidth are believed to be substantially greater than these figures.
TL;DR: Because of the excellent results of the noise-loading test on an IMPATT oscillator that is phase-locked to an external FM driving signal, a new microwave amplifier for multichannel FM signals using a synchronized oscillator is proposed.
Abstract: Because of the excellent results of the noise-loading test on an IMPATT oscillator that is phase-locked to an external FM driving signal, a new microwave amplifier for multichannel FM signals using a synchronized oscillator is proposed. An IMPATT oscillator, injection-synchronized with an FM signal, is regarded as an amplifier and its noise characteristics for multichannel signals are evaluated with the noise-loading method as recommended by the International Radio Consultative Committee. The results show that when this oscillator satisfies the noise characteristics for 960 telephone message channels, it assures a gain of approximately 15 dB at 11 GHz, and in this sense, this oscillator can be regarded as an amplifier for multimessage channels. The degradation of SNR of this amplifier is less than 2 dB. This excellent result is obtained because of the following. In the video band, the modulation suppression of an FM driving signal in the injection-synchronized oscillator, such as the IMPATT, is very small, while the oscillator noise, which dominates the entire output characteristic, is considerably reduced by the synchronizing action of the oscillator. This amplification continues up to the high-frequency range in which this principle of operation applies.
TL;DR: The method proposed uses a series approximation to a convolution integral solution that is equivalent to charge-control operation and higher order terms provide improved accuracy in terms of lumped elements of an equivalent circuit, but the real merit of the series form is its ready adaptability to computer- programmed node-branch circuits analysis.
Abstract: Solid-state devices have complex energy storage effects that complicate their transient operation. A frequently used method of analysis is that of charge control. This method relies upon quasi-static equilibrium and may have significant errors for high-speed operation. The method proposed uses a series approximation to a convolution integral solution. The first term of the series is equivalent to charge-control operation and higher order terms provide improved accuracy in terms of lumped elements of an equivalent circuit, but the real merit of the series form is its ready adaptability to computer- programmed node-branch circuits analysis.
TL;DR: On-chip decoding for address selection is being designed into large- capacity semiconductor memory chips to reduce the number of off-chip interconnections and provide an easy method of selecting a redundant line on the chip.
Abstract: On-chip decoding for address selection is being designed into large- capacity semiconductor memory chips to reduce the number of off-chip interconnections. A combinatorial form of decoding is offered as an alternative to the usual straight binary or selection matrix form of decoding. Combinatorial decoding circuit complexity and pad reduction, and provides an easy method of selecting a redundant line on the chip. This form of decoding uses the (/SUB m//SUP n/) combinations of n bits taken m at a time, whereas the usual binary decoding uses 2/SUP n/ combinations. Because most systems are organized in binary form, a code conversion is required to use the combinatorial form of address decoding. Since the code conversion is equivalent to a level of decoding, there is only a small logic penalty to pay.
TL;DR: In this article, an integrated gyrator circuit that uses bipolar transistors was described, with a simulated inductance of 0.18 H and maximum Q factor of about 380 at 1 kHz.
Abstract: Describes an integrated gyrator circuit that uses bipolar transistors, with a simulated inductance of 0.18 H and maximum Q factor of about 380 at 1 kHz.
TL;DR: It is suggested that the Class-D operation of RF amplifiers is a more accurate model for high-frequency large-signal transistor amplifiers than the conventional Class-C model.
Abstract: Class-D operation of RF amplifiers is characterized by sinusoidal current and pulse-type voltage waveforms at the output of the active circuit element. It is suggested that this is a more accurate model for high-frequency large-signal transistor amplifiers than the conventional Class-C model.
TL;DR: A monolithic MOST differential amplifier is described, having an input resistance of 10/SUP 11/-10/SUP 12/ ohms and the offset and drift, characteristic of present-day MOST's, are reduced to less than 2 mV by an offset correction circuit that retains the differential input capability.
Abstract: A monolithic MOST differential amplifier is described, having an input resistance of 10/SUP 11/-10/SUP 12/ ohms. The offset and drift, characteristic of present-day MOST's, are reduced to less than 2 mV by an offset correction circuit that retains the differential input capability.
TL;DR: This paper attempts to put in perspective the modes of operation of avalanche diodes, and will hopefully remove some of the confusion introduced by the varied names employed by workers in the field to describe basically simular results.
Abstract: This paper attempts to put in perspective the modes of operation of avalanche diodes. Although theoretical treatments exist that encompass all known aspects of avalanche diode behavior, the compartmentalization of behavior into well-understood special cases is of enormous help to the device and circuit designer in understanding the peculiarities encountered in experimental work. The degree of compartmentalization is, of course, an arbitrary choice but the distinction of five modes seems appropriate. These are, respectively, the IMPATT, TRAPATT, and parametric modes, which are potentially useful, and the space-charge feedback and thermal modes, which probably are not. The latter two are important, however, in that they constitute a means of diode self-destruction. The presentation is tutorial and will hopefully remove some of the confusion introduced by the varied names employed by workers in the field to describe basically simular results. The approach is one of reason rather than legalism, and should this particular compartmentalization stand the test of time, appropriate nomenclature will no doubt be decided by an international committee.
TL;DR: A modified version (see abstr. B7204 of 1969) for the realization of gyrators with floating ports is proposed, which very accurately simulates a floating inductor without its being necessary for certain resistors to satisfy a symmetry condition.
Abstract: A modified version (see abstr. B7204 of 1969) for the realization of gyrators with floating ports is proposed. When capacitor loaded the new circuit very accurately simulates a floating inductor without its being necessary for certain resistors to satisfy a symmetry condition, as was the case in the original circuit.
TL;DR: In this article, a fully integrable gyrator circuit was developed from the ideal Z matrix, which was compared with the more conventional Y-matrix realization, and the resultant gyrators were compared with each other.
Abstract: A fully integrable gyrator circuit, which was developed from the ideal Z matrix, is described. The resultant gyrator is compared with the more conventional Y-matrix realization.
TL;DR: In this article, a solid-state amplifier at X band consisting of three cascaded avalanche amplifier stages is described, with a gain of 36 dB and a power output of 0.20 watt.
Abstract: A solid-state amplifier at X band consisting of three cascaded avalanche amplifier stages is described. The amplifier has a gain of 36 dB and a power output of 0.20 watt. A noise figure of 31 dB was measured, using silicon devices in all three stages. Through a combination of microstrip and coaxial circuit techniques a compact unit of 2.5 X 2.5 X 1.0 inches has been obtained. The amplifier operates from a 100-volt supply and consumes approximately 12 watts of dc power.
TL;DR: In this paper, the basic principles of operation of stable (non-oscillating) transferred electron amplifiers are reviewed with the aid of simple physical models, and a simple physical model is proposed.
Abstract: The basic principles of operation of stable (non-oscillating) transferred electron amplifiers are reviewed with the aid of simple physical models.
TL;DR: Capacitor pull-up circuitry is another addition to the numerous techniques the MOS engineer has available as a design tool and offers the potential advantage of high-speed two-phase operation.
Abstract: Capacitor pull-up circuitry is another addition to the numerous techniques the MOS engineer has available as a design tool. This `ratioless'-type circuit offers the potential advantage of high-speed two-phase operation. A complete circuit description and analysis is presented. Included in the analysis are topics covering bipolar injection effects, calculation of optimum size devices, stair-step charging wave forms that have been observed, and overlap capacitance effects. Measured speed performance is below the predicted value and the discrepancy appears to be caused by minority carrier injection into the substrate.