Showing papers in "Interfaces in Computing in 1985"

TL;DR: The experience in interfacing to the Ethernet local area network using VLSI protocol chips is presented and it is found they can be operated together in a reliable and compatible fashion.

TL;DR: In this paper an attempt is made to throw light on the above and other relevant matters pertaining to expert systems.

TL;DR: Emphasis is placed on new hardware and software technology that reduces the number of procedures that a user must remember and do in order to use a system effectively.

TL;DR: The fundamental structure of Fastbus and details of its basic operations are presented and it is shown that both high and low speed devices can be accomodated.

TL;DR: A CAMAC crate controller that can be attached to a FASTBUS cable segment has been designed to incorporate CAMAC systems into a FastBUS environment and meets the multiple controller specification of CAMAC.

TL;DR: In this paper an implementation of the proposed scheme based on the Intel iAPX-432 microprocessor can be used to enforce object protection as well as to minimize the overhead introduced in checking the client's identity.

TL;DR: An overview is given of how different applications each require specific hardware and software to succeed in high energy physics experiments.

TL;DR: The design and implementation of a kernel suitable for interfacing software written in a high-level distributed or concurrent programming language to the underlying multi-microcomputer environment is described.

TL;DR: The results of an experiment investigating typographical errors as a function of line length are presented and recommendations are made for the design of a dialogue management system.

TL;DR: A digital-circuit-switched telecommunications network and its associated supervisory system in use at Sandia National Laboratories, Albuquerque, NM, are described in this paper.

TL;DR: The development of a local area network based on Ethernet running a remote procedure call protocol is described and performance characteristics have been measured and data rates have been consistently recorded for disk-to-disk data transfer between these two machine types.

TL;DR: A new high speed serial CAMAC system developed at Stanford Linear Accelerator Center for general use in control systems and experimental applications and contains an assortment of scan modes particularly useful for data gathering in experiments.

TL;DR: The initial thinking on the integration of artificial intelligence techniques into distributed systems is summarized and the expert systems approach is considered as a design philosophy for large software systems, particularly distributed systems.

TL;DR: A communication link which has been developed between a microcomputer and a mainframe to support several requirements encountered in the context of research projects dealing with handwritten signature verification and character recognition is described in this paper.

TL;DR: The implementation of an emulation of an enhanced interactive terminal, a variant of an IBM 3270, based upon the Acorn BBC microcomputer, is discussed, with a discussion of the advisability of implementation of a manufacturer's protocol at the present stage of development of national and international standards.

TL;DR: This article focuses on the advanced concepts of the iPSB bus, an open system bus architecture for general purpose 8-, 16- or 32-bit microcomputer systems design that incorporates multiple buses.

TL;DR: The interface developed for a package which has been or is being mounted by over a dozen different groups of workers on an equal number of machine-ranges covers the range of so-called "U.K. Coloured Books".

TL;DR: An architecture for dialogue management is defined that supports conceptualization, transformation, generation and realization in dialogue design that promotes functional layering, modularization and invocability of dialogue functions by application systems.

TL;DR: An automatic spectral calibration procedure is described for a Jarrell-Ash (model 78–460) spectrometer and an in-depth semiquantitative discussion about improving the signal-to-noise ratio is presented.

TL;DR: The Snoop module developed at Stanford Linear Accelerator Center provides monitoring and test capabilities for FASTBUS and two Snoop modules have been connected to a host and software has been written to control their monitoring capabilities.

TL;DR: The processing structure model presents a framework for understanding, analyzing and supporting the execution of dataflow programs in a distributed system and initial results from the experimentation are presented.

TL;DR: Pour une langue donnee de selectionner un ensemble minimal d'elements representable par les claviers et codes internes existants and engendrer a l'aide d'un analyseur de contexte le graphisme exact du caractere a visualiser correspondant a chaque element introduit dans the machine.

TL;DR: A simply constructed interface for real-time instrument control and data acquisition has been developed that operates independently, allowing time-shared use of a laboratory minicomputer.