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Patent

Analog open-loop VCO calibration method

TLDR
An analog open-loop voltage controlled oscillator (VCO) calibration circuit and method for selecting the frequency of the VCO for a phase locked loop (PLL) is presented in this article.
Abstract
An analog open-loop voltage controlled oscillator (VCO) calibration circuit and method for selecting the frequency of the VCO for a phase locked loop (PLL). A frequency divider module produces a 50% duty cycle divided local oscillation and a 50% duty cycle divided reference signal, wherein the divided signals are substantially equal. A period-to-voltage conversion module converts the divided local oscillation signal and the divided reference signal to voltages proportional to the divided signals. A comparator module produces a frequency adjustment signal based on a comparison of the proportional voltages and couples the frequency adjustment signal to a logic module which produces a frequency compensation signal based on the frequency adjustment signal. The frequency compensation signal functions to adjust the configuration of switched capacitors in a capacitor bank, coupled to the VCO tuned circuit, until the divided local oscillation signal is substantially equal to the divided reference signal.

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Citations
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References
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Semiconductor integrated circuit device for communication

TL;DR: In this paper, a self-bias type voltage amplifier is used to suppress a variation in the level of each harmonic component even though an external power supply voltage varies, and the level converter includes a coupling capacitor, an amplifying transistor, a load and a bias element, which amplifies a reference frequency signal of the reference frequency oscillator.
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Calibration circuit for VCO

TL;DR: In this paper, a phase-locked loop circuit includes an array of selectable capacitors formed within the phase locked loop circuit to provide a degree of coarse frequency control by adding or removing capacitors.
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Low power fractional pulse generation in frequency tracking multi-band fractional-N phase lock loop

TL;DR: In this article, a dynamic power approach where the compensation circuitry is biased only during the fractional portion of the cycle is proposed to provide the advantages of fractional-N synthesizers with spur suppression, such as higher speed and lower phase noise with ultra low power dissipation.
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Fractional-spurs suppression scheme in frequency tracking multi-band fractional-N phase lock loop

TL;DR: In this paper, the authors used fractional compensation timing circuitry to track a VCO output frequency, f O, and provide highly effective error cancellation in a fractional-N PLL synthesizer.
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Multiple-VCO tuning

TL;DR: In this article, a tuning circuit for use in tuning multiple voltage-controlled oscillators (VCOs) of a phase-locked loop (PLL) is provided, where a search algorithm is used to determine which VCO to use for a given frequency to be synthesized by the PLL.