Patent
Clock driven voltage comparator employing master-slave configuration
TLDR
In this paper, a pair of clock driven voltage comparators are arranged in a master-slave configuration so that voltage comparisons are made only on a clock edge and the output is held valid over the entire clock period.Abstract:
A pair of clock driven voltage comparators are arranged in a master-slave configuration so that voltage comparisons are made only on a clock edge and the output is held valid over the entire clock period. Each comparator stage includes a latch to lock the comparator output in the logical state it was in when the latch was enabled.read more
Citations
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High speed comparator circuit with input-offset compensation function
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References
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Patent
Bistable multivibrator circuit
L Mesa,R Treadway +1 more
TL;DR: In this article, a bistable multivibrator circuit which is readily adaptable to monolithic integrated circuit technology combines the master and slave portions and utilizes split current sources to reduce the components needed to provide a master/slave circuit operation.
Patent
Zero crossing detecting circuit
TL;DR: In this article, a zero crossing detecting circuit is provided for detecting each zero crossing of a data signal without interference from noise during a data detecting or decoding operation, and a bistable latch is applied to logic circuitry to prevent the latch from changing state in response to a succession of immediately following noise-produced zero crossings.