Book ChapterDOI
Cluster-Driven Hardware/Software Partitioning and Scheduling Approach for a Reconfigurable Computer System
Theerayod Wiangtong,Peter Y. K. Cheung,Wayne Luk +2 more
- pp 1071-1074
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TLDR
A two-phase clustering algorithm is introduced as a preprocessing step to an existing hardware/software partitioning and scheduling system, resulting in a higher degree of parallelism and a better mapping to the reconfigurable resource.Abstract:
To achieve a good performance when implementing applications in codesign systems, partitioning and scheduling are important steps. In this paper, a two-phase clustering algorithm is introduced as a preprocessing step to an existing hardware/software partitioning and scheduling system. This preprocessing step increases the granularity in the partition design, resulting in a higher degree of parallelism and a better mapping to the reconfigurable resource. This cluster-driven approach shows improvements in both the makespan of the implementation, and the CPU runtime.read more
Citations
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Journal ArticleDOI
Hardware/software codesign: a systematic approach targeting data-intensive applications
TL;DR: This article presents a systematic approach to hardware/software codesign targeting data-intensive applications and focuses on the application processes that can be represented in directed acrylic graphs (DAGs) and use a synchronous dataflow model, the popular form of dataflow employed in DSP systems when running the process.
Proceedings ArticleDOI
A Multipurpose Clustering Algorithm for Task Partitioning in Multicore Reconfigurable Systems
TL;DR: A clustering framework along with a flexible multi-purpose clustering algorithm that initiates task clustering at the functional level based on dynamic profiling information is introduced that targets two objectives, to form workload-balanced and loosely-coupled clusters.
Book ChapterDOI
A Unified Codesign Run-Time Environment for the UltraSONIC Reconfigurable Computer
TL;DR: A codesign environment with automatic partitioning and scheduling between a host microprocessor and a number of reconfigurable processors is described and a unified runtime environment for both hardware and software tasks under the control of a task manager is proposed.
Multithreading for Embedded Reconfigurable Multicore Systems
TL;DR: This dissertation addresses the problem of performance efficient multithreading execution on heterogeneous multicore embedded systems by categorizing the existing program execution models from the processor-coprocessor synchronization prospective, and introducing new parallel execution models.
References
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Journal ArticleDOI
Comparing Three Heuristic Search Methods for Functional Partitioning in Hardware–Software Codesign
TL;DR: This paper compares three heuristic search algorithms: genetic algorithm (GA), simulated annealing (SA) and tabu search (TS), for hardware–software partitioning and shows that TS is superior to SA and GA in terms of both search time and quality of solutions.
Journal ArticleDOI
Fine-grained and coarse-grained behavioral partitioning with effective utilization of memory and design space exploration for multi-FPGA architectures
TL;DR: The novel feature in the partitioning approaches is that the physical memory in the RC is effectively used to alleviate the FPGA pin-out and inter-FPGA interconnection bottle-neck.
Book ChapterDOI
UltraSONIC: A Reconfigurable Architecture for Video Image Processing
TL;DR: It is shown how solutions for new applications can be implemented quickly using hardware based on reconfigurable logic using the UltraSONIC architecture, and how the software interface abstracts the hardware to simplify hardware/software co-design, permitting parallel development of hardware and software.
Proceedings ArticleDOI
A greedy task clustering heuristic that is provably good
TL;DR: A simple greedy algorithm is presented for task clustering with duplication (or recomputation) which, for a task graph with arbitrary granularity, produces a schedule whose makespan is at most twice optimal.