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Proceedings ArticleDOI

Computer Aided Testability

T.L. Fennell, +1 more
- pp 6-11
TLDR
The potential role of computer aided testability in the design process is described, and five recommended testability tool categories discussed: Testability Allocation, Test Point Location, Testability Analysis, BIT Selector, and Automatic Test Program Generation.
Abstract
Much has been written on the poor testability of military electronics especially 'cannot duplicate' and 'retest OK' problems at organizational and depot level facilities, respectively. The resulting in creased logistics costs add significantly to system's overall life cycle costs. To be effective and reduce these costs, testability must be an integrated system development task where it is designed-in rather than added-to a product. A primary road-block to this approach has been a lack of widespread knowledge of testability design approaches and availability of tools to help the designer. As important as knowledge and availability are, a third facet is of at least equal importance, ease and efficiency of use. One means through which this last element can be fostered is through the development of computer aided testabil ity design tools. Practical Computer Aided Testability (CAT) design tools must integrate smoothly with both the traditional top-down design process (conceptual design, system design, subsystem design, detailed design) and other existing Computer Aided Design (CAD) tools. This paper discusses CAD systems and the level of their present support to testability. In particular, the potential role of computer aided testability in the design process is described, and five recommended testability tool categories discussed: Testability Allocation, Test Point Location, Testability Analysis, BIT Selector, and Automatic Test Program Generation. The role of these tools and their use during the design process along with their present state of development is described, as is the potential impact of integrating them with existing CAD systems.

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Citations
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Book ChapterDOI

Analog Fault Diagnosis

TL;DR: A simulation-after-test algorithm for the analog fault diagnosis problem is presented, in which a bound on the maximum number of simultaneous faults is used to minimize the number of test points required.
Journal ArticleDOI

Design of testability for analogue fault diagnosis

TL;DR: A necessary and sufficient condition for pseudo-circuit generation is presented for the use of the pseudo-Circuit in the self-test algorithm, and a testability condition is presented with examples to determine the diagnosability of a designed circuit.
Book ChapterDOI

A Searching Approach Self-Testing Algorithm for Analog Fault Diagnosis

Chin-Long Wey
TL;DR: The analog test problem is characterized by tolerance, modeling, and simulation problems which have no counterpart in the digital problem, while many of the concepts derived from the analog design problem are incompatible with the economics of the test environment.
Journal ArticleDOI

Bibliography of literature on testability

TL;DR: In this paper, a list of selected references on testability and related areas is presented, along with a brief discussion of testability in general and testability related issues in particular.