Constraint transformation techniques for synthesis of analog systems

TLDR: A profile based analog component characterization and constraint transformation method that uses this profile based optimization technique and it's effectiveness on applications like interconnect performance optimization and flash A-D converter design optimization is evaluated.

Abstract: With improving process technologies, mixed-signal Systems-On-Chip (SOC) are becoming a reality. Analog synthesis tools help in making the transition from abstract behavioral models of analog systems to transistor net-lists. An important part of a top-down analog synthesis process is a mechanism to communicate performance specifications and constraints on design elements used at one level to those at the next. This task of transforming high-level performance specifications into component parameters is called constraint transformation. During the synthesis process it is also required to select a suitable implementation for a component from a set of available ones. This task is called component selection. This dissertation investigates techniques for performing the tasks of constraint transformation and component selection. The task of constraint transformation involves two steps, (1) Generation of a constraint model relating the parameters, and (2) Constraint allocation (model solving), that computes actual values for the parameters. We classified techniques for constraint transformation baud on bow the tab of model generation and model solving could be done. I he first category is SCSP - Static model generation and CSP (constraint satisfaction problem) based model solving, where the user provides a constraint model relating the system constraints to component level constraints. The next class is PDOPT - Pseudo Dynamic model generation and OPTimization based model solving. The final class of constraint transformation techniques is DOPT - Dynamic model generation and OPTimization based model solving. We present techniques of Search Space Profiling and Search Space Decomposition to improve the performance of the GA based optimizer used in PDOPT and DOPT. Empirical evidence on the effectiveness of search space profile based optimization is provided through case studies on applications like frequency response optimization of RC ladders, VLSI interconnect performance optimization and design of digital IIR filters. We present a profile based analog component characterization and constraint transformation method that uses this profile based optimization technique. We present a two-level decomposition based optimization technique and evaluate it's effectiveness on applications like interconnect performance optimization and flash A-D converter design optimization. In the context of the optimization based model solving method, we also proposed a technique for system level parameter space exploration during constraint transformation to compute intervals for design parameters. The result of constraint transformation and component selection are a set of design parameter values and component topologies that could be either given to circuit synthesis tools to produce a sized transistor net-list or the sizes generated by the estimator APE could directly be fed to a layout synthesis tool. (Abstract shortened by UMI.)