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Proceedings ArticleDOI

Designing MPSoC platforms for throughput constrained applications with multiple use-cases

Ahsan Shabbir
- pp 108-117
TLDR
A novel heuristic algorithm is presented that can design MPSoC platforms and map tasks of multiple applications onto this platform while satisfying the throughput constraints of these applications, and allows sharing of resources between multiple applications.
Abstract
The number of applications executing on multimedia systems is increasing every year. These applications execute in different combinations, known as use-cases. Each application may require guarantees on its performance. Ensuring that all applications meet their throughput requirements in all use-cases with minimum silicon area is a design challenge. In this paper, we present a novel heuristic algorithm that can design MPSoC platforms and map tasks of multiple applications onto this platform while satisfying the throughput constraints of these applications. Our algorithm tries to achieve this goal with minimum hardware area. It exploits the mutual exclusion conditions for concurrent execution of applications, as specified with the use-cases, and allows sharing of resources between multiple applications. There are a number of other techniques (load balancing etc.) that also save resources by sharing them but the feature that distinguishes our work from other related techniques is the fact that in minimization of hardware resources, we not only optimize the computation resources but also optimize the memory and buffer requirements in the interconnect.

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Citations
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Exploring Trade-Offs inBuffer Requirements and Throughput Constraints forSynchronous Dataflow Graphs*

Sander Stuijk
TL;DR: This work presents exact techniques to chart the Pareto space of throughput and storage tradeoffs, which can be used to determine the minimal storage space needed to execute a graph under a given throughput constraint.

Scheduling Multiprocessor Tasks with Genetic Algorithms

TL;DR: In this paper, an efficient method based on genetic algorithms is developed to solve the multiprocessor scheduling problem, which assumes fixed number of processors and tasks are represented by a directed acyclic graph.
References
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Proceedings ArticleDOI

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Embedded Multiprocessors: Scheduling and Synchronization

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Proceedings ArticleDOI

A scenario-aware data flow model for combined long-run average and worst-case performance analysis

TL;DR: A scenario-aware generalisation of the synchronous data flow model, which uses a stochastic approach to model the order in which scenarios occur and can be analysed for both long-run average and worst-case performance metrics using existing exhaustive or simulation-based techniques.
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