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Efficient hardware hashing functions for high performance computers

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TLDR
It is shown that, by choosing hashing functions at random from a particular class, called H/sub 3/, of hashing functions, the analytical performance of hashing can be achieved in practice on real-life data.
Abstract
Hashing is critical for high performance computer architecture. Hashing is used extensively in hardware applications, such as page tables, for address translation. Bit extraction and exclusive ORing hashing "methods" are two commonly used hashing functions for hardware applications. There is no study of the performance of these functions and no mention anywhere of the practical performance of the hashing functions in comparison with the theoretical performance prediction of hashing schemes. In this paper, we show that, by choosing hashing functions at random from a particular class, called H/sub 3/, of hashing functions, the analytical performance of hashing can be achieved in practice on real-life data. Our results about the expected worst case performance of hashing are of special significance, as they provide evidence for earlier theoretical predictions.

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Citations
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Journal ArticleDOI

RAIDR: Retention-Aware Intelligent DRAM Refresh

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Proceedings ArticleDOI

Data streaming algorithms for efficient and accurate estimation of flow size distribution

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Patent

Intelligent data storage and processing using fpga devices

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Patent

Method and device for high performance regular expression pattern matching

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Patent

High Speed Processing of Financial Information Using FPGA Devices

TL;DR: In this paper, a combination of software logic and firmware logic can be used to efficiently control and manage the high speed flow of financial market data to and from the reconfigurable logic.
References
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The Art of Computer Programming

TL;DR: The arrangement of this invention provides a strong vibration free hold-down mechanism while avoiding a large pressure drop to the flow of coolant fluid.
Journal ArticleDOI

Universal classes of hash functions

TL;DR: An input independent average linear time algorithm for storage and retrieval on keys that makes a random choice of hash function from a suitable class of hash functions.
Journal ArticleDOI

Expected Length of the Longest Probe Sequence in Hash Code Searching

TL;DR: An investigation ts made of the expected value of the maximum number of accesses needed to locate any element m a hashing file under various colhston resoluuon schemes, showing that the actual behawor of the worst case in hash tables is quite good on the average.
Journal ArticleDOI

801 storage: architecture and programming

TL;DR: The 801 minicomputer project has developed a low-level storage manager that can significantly simplify storage programming in subsystems and applications and is intended to be extensible across a wide performance/cost spectrum.