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Globally-Asynchronous Locally-Synchronous Systems.

D M Chapiro
TLDR
In this article, the authors provide a new framework for the design of very high performance digital machines and present new algorithms to compile the specifications of such machines onto efficient circuits, and to verify the correctness of the resulting machines.
Abstract
: This thesis provides a new framework for the design of very high performance digital machines. The new theoretical results which are presented have practical implications, and lead to a better understanding of possibilities and limitations in the design of computers, communication hardware and other digital machinery. The discussion centers on different organizations for globally-asynchronous, locally-synchronous systems, and covers the following issues: organizations for complex digital systems, metastability as a limitation for high performance, structures for two classes of non-conventional architectures, optimization, performance, reliability, and design techniques. We present new algorithms to compile the specifications of such machines onto efficient circuits, and to verify the correctness of the resulting machines. The models we developed for the analysis of the tradeoffs between different variables that affect the safety of operation of these systems, show that the proposed organizations result in extremely fast and reliable digital machines. The proposed organizational schemes can be used within a wide range of architectures, and integrated circuits designed according to this methodology have been developed and tested. (Author)

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Journal ArticleDOI

A survey of research and practices of Network-on-chip

TL;DR: The research shows that NoC constitutes a unification of current trends of intrachip communication rather than an explicit new alternative.
Book

Principles of Asynchronous Circuit Design: A Systems Perspective

TL;DR: Industrial designers with a background in conventional (clocked) design to be able to understand asynchronous design sufficiently to assess what it has to offer and whether it might be advantageous in their next design task.
Proceedings ArticleDOI

Practical design of globally-asynchronous locally-synchronous systems

TL;DR: This paper describes a complete design methodology for a globally asynchronous on-chip communication network connecting both locally-synchronous and asynchronous modules and confirmed the validity of the concept by applying it to an ASIC design implementing the Safer crypto-algorithm.
Journal ArticleDOI

Asynchronous Techniques for System-on-Chip Design

TL;DR: The paper discusses asynchronous handshake protocols for communication and the notion of validity/neutrality tests, and completion tree, and basic building blocks for asynchronous VLSI systems, with an emphasis on communication and synchronization.