Patent
Integrated circuit failure analysis using color voltage contrast
Reads0
Chats0
TLDR
In this paper, a first image is obtained using an emission or electron microscope while an integrated circuit is operating under a first set of conditions, and then the image is integrated for improved resolution with a camera in front of the microscope screen or with a digitizer coupled with video signals from the microscope.Abstract:
A method and apparatus for analyzing failures in integrated circuits. A first image is obtained using an emission or electron microscope while an integrated circuit is operating under a first set of conditions. The image is integrated for improved resolution with a camera in front of the microscope screen or with a digitizer coupled to receive video signals from the microscope. The first image is digitized and stored in a first channel of an RGB digitizer board and displayed on a display screen. A second image is obtained in the same way and is digitized and stored in a second channel of the RGB digitizer board and displayed on the display screen. The remaining channel of the RGB digitizer board is coupled to receive live images. The resulting combined image appears as a black and white image so long as the images are aligned. Any differences between the three images will appear conspicuously in color. The input logic levels to the integrated circuit are changed. Nodes having changed logic levels will appear in color in the display because they will only affect the third channel. In addition, the displayed image will simultaneously show nodes which have not changed states in different shades of grey depending upon the unchanged logic level. The displayed image may then be compared to a previously obtained reference image from an integrated circuit known to not have any defects. Any differences between the two images will indicate the exact location of a failure or defect.read more
Citations
More filters
Patent
Apparatus and method for reducing defects in a semiconductor lithographic process
TL;DR: In this article, an arrangement for optimizing a lithographic process forms a pattern on a silicon wafer using a photocluster cell system to simulate an actual processing condition for a semiconductor product.
Patent
Method of manufacturing a light emitting device and thin film forming apparatus
TL;DR: In this paper, a method of manufacturing a light emitting device is described in which satisfactory image display can be performed by the investigation and repair of short circuits in defect portions of light emitting elements.
Patent
Apparatus and method for detecting photon emissions from transistors
TL;DR: In this paper, a system, apparatus, and method for analyzing photon emission data to discriminate between photons emitted by transistors and photon emitted by background sources is presented. But the analysis involves spatial and/or temporal correlation of photon emissions.
Patent
Probe cards employing probes having retaining portions for potting in a potting region
TL;DR: In this paper, the authors present a method and apparatus using a retention arrangement for probes used for electrical testing of a device under test (DUT), which can be used with space transformers, a variety of probes of different geometries and scrub motion characteristics and is well suited for use in probe card apparatus under tight pitch and small tolerance requirements.
Patent
Vertical probe array arranged to provide space transformation
TL;DR: In this paper, an array of vertical probes having all of the probe tips aligned along a single contact line, while the probe bases are arranged in an array having two or more rows parallel to the contact line.
References
More filters
Patent
Modular processing apparatus for processing semiconductor wafers
TL;DR: In this paper, a self-contained modular processing apparatus for processing workpieces, and in particular, silicon wafers, is described, which is constructed of framed modules which plug into a service facility docking subassembly and interlock therewith to make up a complete modular processing system for wafer processing.
Patent
Method and apparatus for automatic wafer inspection
TL;DR: An automatic semiconductor wafer inspection system including a wafer inspector, a system computer that performs movement and function control and data storage functions and a high speed image computer is described in this paper.
Patent
Emission microscopy system
TL;DR: In this paper, an optical emission microscopy system with a macro optic system having a high numerical aperture for obtaining global views of an integrated circuit Device Under Test (DUT) is presented, and images are obtained to form a "global difference" image in which defects, wherever located in the chip, can be discerned by the system operator.
Patent
Scanning tunneling microscope
TL;DR: In this paper, a cylindrical piezoelectric actuator is attached to a metal frame with a probe, which is used to control the distance between the probe and the surface of the sample.
Patent
Transportable image emission microscope
TL;DR: In this article, an emission microscope is mounted on a transportable structure for use on a test floor and encloses or garages an entire automatic test equipment head to facilitate high-speed testing.