Patent
Integrated logic circuit adapted to performance tests
TLDR
In this paper, a plurality of flip-flops are used to form a feedback shift register, which is coupled to the AND logic array outputs of a combinational circuit which also includes and OR logic array.Abstract:
An easily testable integrated logic circuit utilizes a plurality of flip-flops to form a feedback shift register. In some embodiments, means are provided for selectively forming the flip-flops into a feedback shift register and for selectively supplying either the flip-flop contents or a random signal as partial inputs to the combinational logic circuit. In other embodiments, the feedback shift register is coupled to the AND logic array outputs of a combinational circuit which also includes and OR logic array.read more
Citations
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Configurable electrical circuit having configurable logic elements and configurable interconnects
TL;DR: In this article, a configurable logic array is defined as a plurality of logic elements that can be configured to perform different logic functions depending upon the control information placed in each logic element.
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TL;DR: In this article, a linear compactor with a selection circuitry for selectively passing test responses to the compactor is proposed, where a gating logic is controlled by a control register, a decoder, and flag registers.
References
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TL;DR: In this paper, a planer assembly is used to plan a paved roadway, and a floating moldboard is yieldingly forced into contact with the roadway to the rear of the planer and cooperates with a reclaimer assembly to receive and transport the removed pavement material to a selected depository.
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TL;DR: In this paper, a digital product inspection system using a digital pseudorandom generator in combination with a charactertistic of the product being inspected to produce a unique set of data combinations which when compared with previously taken data from the test of a ''''known good unit'' will provide an output indicating whether or not the characteristic of the unit under test is within acceptable limits.
Patent
Logic array with testing circuitry
Se J. Hong,Daniel L. Ostapko +1 more
TL;DR: In this paper, the authors describe arrays for performing logic functions which include circuitry for testing the arrays to see if the arrays will perform the logic functions that they were designed to perform.
Patent
Nonlinear nonsingular feedback shift registers
TL;DR: In this article, four classes of nonlinear nonsingular feedback shift registers (NLFSR) are disclosed, and each NLFSR has a feedback arrangement which is a function of a primative polynomial of degree r-1.
Patent
Method for testing logic chips and logic chips adapted therefor
TL;DR: In this article, a test method for testing logic chips and logic chips adapted to be tested by said test method is disclosed wherein the logic chip or monolithic structure, is arranged, or divided, into functional subassemblies, or logic locks, exhibiting a high degree of testability and includes integrated decoding means allowing individual sub-assemblies to be selected.