Patent
Memory management arrangement for microprocessor systems
TLDR
In this article, a memory management system is designed for use with a self-contained microprocessor to form a multi-user computer, which operates to establish user and kernel modes each having different operating permissions.Abstract:
A memory management system is structured for use with a self-contained microprocessor to form a multi-user computer. The system operates to establish user and kernel modes each having different operating permissions. When the system is operating in the user mode, certain of the fixed functions of the microprocessor, such as interrupt-off and halt, are blocked from enablement by any user. The system is designed having multiple memory maps, some accessible when in the user mode and all accessible from the kernel mode.read more
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Patent
Security system for microcomputers
Michael J. Allen,John Langlois +1 more
TL;DR: A security system for a personal computer, in which hardware and software are combined to provide a tamper-proof manner of protecting user-access and file-access, is described in this article.
Patent
Method and operating system for executing programs in a multi-mode microprocessor
TL;DR: In this article, the authors present a mode switching method for multi-mode operating systems using Intel 80286 microprocessors, including means for storing the operating system routines to maximize performance of the system in real mode.
Patent
Method to control i/o accesses in a multi-tasking virtual memory virtual machine type data processing system
TL;DR: In this article, a page-segmented virtual memory data processing system is described, in which virtual machines running UNIX type operating systems are concurrently established, and a memory manager controls the transfer of information between primary and secondary storage devices in response to the occurrence of page faults.
Patent
Automatic sizing memory system with multiplexed configuration signals at memory modules
TL;DR: In this article, a configuration status register can include several independent status registers, each corresponding to a different memory module, each of the status registers can contain a base address identifying the starting address of each memory module.
Patent
High-speed memory and memory management system
TL;DR: In this paper, an improved memory management system is described having particular application for use in computer systems employing virtual memory techniques, which includes a CPU and other data processing devices, such as I/O devices, direct memory access (DMA) units, a system bus, etc., which are coupled to a "virtual" address bus for transferring virtual address information to a main memory unit.
References
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Patent
Microprocessor memory management and protection mechanism
TL;DR: In this paper, a memory management and protection mechanism in which access to protected entitites is controlled is presented, where each task within the system operates at one and only one privilege level at any instant in time.
Patent
Large scale multi-level information processing system employing improved failsaft techniques
TL;DR: A multiprogrammed multiprocessing information processing system has independently operating computing, input/output, and memory modules through an exchange, and interacting with a multilevel operating system designed to automatically makes optimum use of all system resources by controlling system resources and by scheduling jobs in the multiprogramming mix of the processing system as mentioned in this paper.
Patent
Protection of data in an information multiprocessing system by implementing a concept of rings to represent the different levels of privileges among processes
TL;DR: In this article, a ring protection hardware system is used to prevent processes from intering with each other or sharing each other's address space in an unauthorized manner in hardware/firmware by restricting addressability to a segmented memory.
Patent
Hierarchical security mechanism for dynamically assigning security levels to object programs
TL;DR: In this paper, a hierarchy of security levels organized as a hierarchy is established by both problem programmers, and the operating system are then controlled by the operating systems, which allows a program to specify a predetermined security level for other programs which it invokes, while at the same time being subject to security restraints placed on it either by a higher priority level invoking program or by operating system.
Patent
Memory access control system
TL;DR: A memory control for use in a digital computer system during each memory reference is monitored as discussed by the authors, which includes the general accessibility of the location for any purpose, the availability of location to certain users and operating restrictions which can be performed with information which the location contains.