Patent
Method and apparatus for rendering of fractional pixel lists for anti-aliasing and transparency
TLDR
In this article, a system for rendering visual images that combines sophisticated anti-aliasing and pixel blending techniques with control pipelining in hardware embodiment is presented, where a highly-parallel rendering pipeline performs sophisticated polygon edge interpolation, pixel blending and pixel rendering operations in hardware.Abstract:
A system for rendering visual images that combines sophisticated anti-aliasing and pixel blending techniques with control pipelining in hardware embodiment. A highly-parallel rendering pipeline performs sophisticated polygon edge interpolation, pixel blending and anti-aliasing rendering operations in hardware. Primitive polygons are transformed to subpixel coordinates and then sliced and diced to create "pixlink" elements mapped to each pixel. An oversized frame buffer memory allows the storage of many pixlinks for each pixel. Z-sorting is avoided through the use of a linked-list data object for each pixlink vector in a pixel stack. Because all image data values for X, Y, Z, R, G, B and pixel coverage A are maintained in the pixlink data object, sophisticated blending operations are possible for anti-aliasing and transparency. Data parallelism in the rendering pipeline overcomes the processor efficiency problem arising from the computation-intensive rendering algorithms used in the system of this invention. Single state machine control is made possible through linked data/control pipelining.read more
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References
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Book
Computer Graphics: Principles and Practice
TL;DR: This chapter discusses the development of Hardware and Software for Computer Graphics, and the design methodology of User-Computer Dialogues, which led to the creation of the Simple Raster Graphics Package.
Proceedings ArticleDOI
The A -buffer, an antialiased hidden surface method
TL;DR: The A-buffer (anti-aliased, area-averaged, accumulation buffer) is a general hidden surface mechanism suited to medium scale virtual memory computers using an easy to compute Fourier window (box filter).
Proceedings ArticleDOI
The accumulation buffer: hardware support for high-quality rendering
Paul Haeberli,Kurt Akeley +1 more
TL;DR: A system architecture that supports realtime generation of complex images, efficient generation of extremely high-quality images, and a smooth trade-off between the two based on the paradigm of integration with an additional high-precision image buffer.
Patent
Programmable digital video processing system
TL;DR: In this article, a programmable apparatus for digital processing of video signals from multiple sources converted to digital format to provide real-time multiple simultaneous special video effects and suitable for direct interface to a conventional microcomputer bus such as an Apple Macintosh II NuBus.