Patent
Network device and method of controlling flow of data arranged in frames in a data-based network
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TLDR
In this article, a look-ahead watermark flag is checked at the FIFO memory to determine if sufficient memory space exists inside the memory for an additional data burst, which is transferred through the direct memory access unit to the FifO memory when the lookahead water-mark flag indicates that sufficient space is available.Abstract:
A method and network device are disclosed using a look-ahead watermark in a FIFO memory. In accordance with the present invention, a watermark interrupt is generated from a FIFO memory when data in the FIFO memory has crossed a watermark threshold. A data burst is transferred through a direct memory access unit to the FIFO memory. A look-ahead watermark flag is checked at the FIFO memory to determine if sufficient memory space exists inside the FIFO memory for an additional data burst, which is transferred through the direct memory access unit to the FIFO memory when the look-ahead watermark flag indicates that sufficient memory space is available.read more
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References
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Patent
Memory management system and method for network controller
TL;DR: In this paper, the first and second memories of a system reside on separate buses connected to a common bus containing a processor, and the processor communicates with one or the other of the memories using a handshaking protocol.
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Apparatus and method for generating rate control frames in a workgroup switch based on traffic contribution from a network switch port
Mohan Kalkunte,Jayant Kadambi +1 more
TL;DR: In this article, the authors propose a rate controller that generates rate control frames for the remaining network switch ports, where each rate control frame specifies a transmission rate for the transmitting network node based on the corresponding traffic contribution by the network node.
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Network interface with host independent buffer management
TL;DR: In this paper, a network interface controller controls communication between a host system and a network transceiver coupled to a network comprising a memory outside of the host address space in which receive and transmit buffers are managed.
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Method and apparatus for adjusting overflow buffers and flow control watermark levels
Philip Simmons,Robert De Mong +1 more
TL;DR: In this paper, a network switch having a shared memory architecture for storing data frames includes configuration registers that are programmable by a host processor to adjust overflow buffer locations and flow control watermark levels based on monitored network traffic.
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Programmable data packet buffer prioritization arrangement
TL;DR: In this article, each data packet that is transported through the network to a destination node is assigned one of 2**N priority levels based on the type of information contained in the data packet.