Patent
Plastic semiconductor package
TLDR
In this paper, a lead frame for a surface mount semiconductor chip package includes a die attach paddle and leads, with down bond attachment sites on an upper surface of the paddle near a peripheral margin.Abstract:
A lead frame for a surface mount semiconductor chip package includes a die attach paddle and leads, the die attach paddle having down bond attachment sites on an upper surface of the paddle near a peripheral margin of the paddle, and having a central die attach region on an upper surface of the paddle, wherein a portion of the upper surface of the paddle is recessed. In some embodiments the recessed portion of the upper surface of the paddle includes the die attach region, and in other embodiments the recessed portion of the upper surface of the paddle includes a groove. Also, a lead frame surface mount chip package including such a lead frame.read more
Citations
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Patent
Semiconductor device, and manufacturing method thereof
TL;DR: In this article, the oxide semiconductor film has at least a crystallized region in a channel region, which is defined as a region of interest (ROI) for a semiconductor device.
Patent
Thin stacked interposer package
TL;DR: In this paper, a semiconductor package comprising a bottom semiconductor substrate and a top semiconductor top substrate is mounted to the package body and electrically connected to the conductive metal within the via(s) of the package.
Patent
Semiconductor package and method of making using leadframe having lead locks to secure leads to encapsulant
Jae Hak Yee,Young Suk Chung,Jae Jin Lee,Terry W. Davis,Chung Suk Han,Jae Hun Ku,Jae Sung Kwak,Sang Hyun Ryu +7 more
TL;DR: In this article, a lead frame for making a semiconductor package is described, which includes a lead lock provided at a free end of each inner lead that is adapted to increase a bonding force of the inner lead to a resin encapsulate.
Patent
Mounting for a package containing a chip
TL;DR: In this paper, a mounting for a package containing a semiconductor chip is described, along with methods of making such a mounting, and the package is mounted on the substrate so that the cap is in the aperture, and a peripheral portion of the first side of the base is over the mounting surface so as to support the package in an aperture and allow the input/output terminals of the package to be juxtaposed with to the circuit patterns of the substrate.
Patent
Integrated circuit device packages and substrates for making the packages
TL;DR: In this article, integrated circuit device packages and substrates for making the packages are disclosed, and one embodiment of a substrate includes a planar sheet of polyimide having a first surface, an opposite second surface, and apertures between the first and second surfaces.
References
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Patent
Saw-singulated leadless plastic chip carrier
Neil McLellan,Nelson Fan +1 more
TL;DR: Leadless plastic chip carriers as discussed by the authors are formed from a matrix of lead frames provided in a section of a metal strip, each lead frame in the matrix includes a die-attach pad and multiple leads disposed in close proximity to the die attach pad.
Patent
Plastic integrated circuit package and method and leadframe for making the package
TL;DR: In this paper, an integrated circuit die and the methods and leadframes for making such packages are disclosed and a method of making a package includes providing a metal leadframe having a die pad in a rectangular frame.
Patent
Plastic package with exposed die
TL;DR: In this article, a die is mounted in the central opening and is electrically connected to the leads by wire bonding, and a molded plastic casing is formed over the die, wiring and lead frame to encapsulate the package.
Patent
Thermally enhanced quad flat non-lead package of semiconductor
Chien-Ping Huang,Eric Ko +1 more
TL;DR: In this paper, a thermally enhanced quad flat non-lead package of semiconductor comprises a chip, a plurality of leads, and a molding compound, where the leads are disposed at the periphery of the die pad where the bottom surface of the lead has a stepped structure with a relatively thin portion to form a wire-bonding protruded zone.
Patent
Semiconductor devices having different package sizes made by using common parts
TL;DR: In this paper, a semiconductor device having a single semiconductor element and a plurality of segments formed by dividing a conductive plate is described, where some of the segments are electrically coupled with electrodes of the semiconductor elements and constitute lead pad portions as mounting electrodes of semiconductor devices.