Readout Producibility For Z-Technology

TLDR: In this article, a 64-channel Complementary Metal Oxide Semiconductor (CMOS) chopper stabilized circuit with a 64:1 multiplexer output and on-chip clock and bias generation is described.

Abstract: Production rates of low-noise, cryogenic readout devices have been demonstrated. These devices are being produced under a MIL-Q-9858A quality system and are processed per the requirements of MIL-STD-883C. Performance, testability, reliability and producibility of the design have been equally considered throughout the development cycle. All required processes, test methodologies, and quality assurance procedures have been implemented to support production requirements. 1. INTRODUCTION The production cycle discussed is for a 64-channel Complementary Metal Oxide Semiconductor (CMOS) chopper stabilized circuit with a 64:1 multiplexer output and on-chip clock and bias generation.High yields have been obtained by utilizing established silicon foundry design rules and analyzing device sensitivity to process parameters during the design process. Commercial silicon foundries are used in the production process to insure that disciplined design rules, controlled quality, and guaranteed process parameters are followed during wafer fabrication. Wafer handling techniques for subsequent processing of 5 mil thick silicon wafers in a production environment have been developed and implemented.Device testing of cryogenic integrated circuits has long been viewed as a major obstacle to achieving production rate deliveries. Methodologies have been established to maintain low cost and high test throughput. As part of lot acceptance, accelerated life testing is performed on all processed lots prior to delivery.