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Patent

Semiconductor device and method for fabricating the same

TLDR
In this paper, the authors proposed a semiconductor device consisting of a first insulation film 14 formed on a semiconducting substrate, a floating gate electrode 22 formed on the first insulation layer, a second insulation layer on the floating gate, and a control gate electrode on the second insulation film.
Abstract
To provide a semiconductor device which can retain information for a long period of time even in a case that the tunnel insulation film is thin. A semiconductor device comprises a first insulation film 14 formed on a semiconductor substrate 10, a floating gate electrode 22 formed on the first insulation film, a second insulation 24 film formed on the floating gate electrode, and a control gate electrode 26 formed on the second insulation film. A depletion layer is formed in the floating gate electrode near the first insulation film in a state that no voltage is applied between the floating gate electrode and the semiconductor substrate.

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Citations
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Semiconductor Device and Method for Fabricating the Same

TL;DR: In this article, a gate spacer is formed on a sidewall of the recess gate and an insulating film is selectively etched to form a landing plug contact hole, which is then filled with a conductive layer.
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Double and triple gate MOSFET devices and methods for making same

TL;DR: In this article, a double gate MOSFET with a fin, a first gate, a second gate and a third gate is presented. But the first gate is formed on top of the fin and the second gate is placed opposite the fin.
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Tri-gate and gate around MOSFET devices and methods for making same

TL;DR: In this article, a triple gate metal-oxide semiconductor field effect transistor (MOSFET) with fin structures and triple gates is described. But the fin structure is not considered in this paper.
References
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Patent

Manufacture of semiconductor integrated circuit device

TL;DR: In this paper, the authors propose a method to enable the shortening of a required semiconductor integrated circuit in development and production time by a method wherein a mask pattern used in a wiring process is divided into two parts, one is a common pattern which takes no part in a required function and the other is an original pattern other than the common pattern, and only the layout of the original pattern is designed.
Patent

Semiconductor memory with floating gate type FET

TL;DR: In this paper, a tunneling insulating film is formed on the partial surface area of a semiconductor substrate and a floating gate electrode is created on the tunneling film, and a first control gate is disposed on the gate insulating films over the side wall of the floating gate and over a partial surface of the semiconductor substrata on both sides of the float.
Patent

Light floating gate doping to improve tunnel oxide reliability

TL;DR: The reliability of a tunnel oxide is improved by light doping of the floating gate, as with phosphorous or arsenic atoms as mentioned in this paper, which can be implemented by ion implantation or by in situ deposition.
Patent

Method for operating nonvolatile memory semiconductor devices memories

TL;DR: In this paper, a method for erasing a flash memory wherein "overerasing" can be prevented was proposed, in which a gate voltage of 3 volts was applied to a control gate electrode and a voltage of 15 volts to a source.