Proceedings ArticleDOI
Sequential synthesis for table look up PGAs
Rajeev Murgai,Robert K. Brayton,Alberto Sangiovanni-Vincentelli +2 more
- pp 32-37
TLDR
Two algorithms for mapping a sequential circuit onto a specific table look up architecture, namely the Xilinx 3090 architecture, are presented, using the combinational synthesis techniques to solve the sequential synthesis problem.Abstract:
The algorithms for synthesis onto programmable gate arrays (PGAs) have so far addressed only the combinational logic problem. The authors present two algorithms for mapping a sequential circuit onto a specific table look up architecture, namely the Xilinx 3090 architecture. The first algorithm maps combinational and sequential elements simultaneously. In the second, combinational elements are mapped first, followed by the sequential elements. The combinational synthesis techniques are used to solve the sequential synthesis problem. >read more
Citations
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References
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Proceedings ArticleDOI
Logic synthesis for programmable gate arrays
Rajeev Murgai,Yoshihito Nishizaki,Narendra Shenoy,Robert K. Brayton,Alberto Sangiovanni-Vincentelli +4 more
TL;DR: The problem of combinational logic synthesis is addressed for two interesting and popular classes of programmable gate array architectures: table-look-up and multiplexor-based.