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Suppression of anomalous drain current in short channel mosfet.

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TLDR
In this article, deep ion implantation of acceptor impurities beneath the channel is found to improve the sub-threshold voltage characteristics of short channel nMOSFET in the subthreshold region.
Abstract
The current voltage characteristics of short channel nMOSFET in the subthreshold region is investigated by two-dimensional numerical analysis. Deep ion implantation of acceptor impurities beneath the channel is found to improve the subthreshold characteristics. Structure optimization for the deeply ion-implanted short channel MOSFET is carried out to obtain low subthreshold current with steep semilogarithmic slope, which are almost comparable with the long channel MOSFET.

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Patent

Low threshold voltage, high performance junction transistor

TL;DR: In this paper, the exact dopant concentrations and locations of the buried electrodes are provided such that punch through is avoided in low threshold voltage MOS devices having buried electrodes. But the exact locations of these electrodes are not specified.
Patent

Method of making asymmetric low power MOS devices

TL;DR: An asymmetric halo implant provides a pocket region located under a device's source or drain near where the source (or drain) edge abuts the device's channel region as discussed by the authors, which has the same conductivity type as the device bulk (albeit at a higher dopant concentration).
Patent

Short channel MOSFET with buried anti-punch through region

TL;DR: A semiconductor device having a source region, a drain region and a channel region which are formed in a surface portion of a semiconductor substrate, and a gate formed with a material having a relatively high built-in voltage relative to the source region is considered in this article.
Patent

Asymmetric low power MOS devices

TL;DR: An asymmetric halo implant provides a pocket region located under a device's source or drain near where the source (or drain) edge abuts the device's channel region as discussed by the authors, which has the same conductivity type as the device bulk (albeit at a higher dopant concentration).
Patent

A bidirectional blocking lateral mosfet with improved on-resistance.

TL;DR: In this article, a bidirectional current blocking lateral power MOSFET including a source and a drain which are not shorted to a substrate, and voltages that are applied to the source and drain are both higher than the voltage at which the body is maintained (for an N-channel MOS-FET) or lower than the body was maintained ( for a P-channel MC-MOS-FCET) is presented.
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