Patent
System for minimizing latency data reception and handling data packet error if detected while transferring data packet from adapter memory to host memory
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TLDR
In this paper, a method and system within a data processing system are disclosed for receiving information from a communications network, where a portion of a packet of information is received from the communications network at the adapter memory within the communications adapter.Abstract:
A method and system within a data processing system are disclosed for receiving information from a communications network. The data processing system includes a communications adapter, having an adapter memory, and a host memory. The communications adapter is coupled to the communications network, which transmits information to the data processing system in packets including a packet header and packet data. According to the present invention, a portion of a packet of information is received from the communications network at the adapter memory within the communications adapter. The portion of the packet of information includes at least a packet header that specifies a length of the packet of information and a destination address within the host memory. In response to receipt of the portion of the packet of information, a transfer of the packet of information from the adapter memory to the host memory is prepared prior to receipt of a final portion of the packet of information at the adapter memory. The packet of information is then transferred from the adapter memory to addresses within the host memory beginning with the destination address. Since the transfer is prepared before packet receipt is complete, perceived latency is minimized.read more
Citations
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Patent
TCP/IP offload network interface device
Laurence B. Boucher,Stephen E. J. Blightman,Peter K. Craft,David A. Higgen,Clive M. Philbrick,Daryl D. Starr +5 more
TL;DR: The Intelligent Network Interface Card (INIC) or communication processing device (CPD) as mentioned in this paper works with a host computer for data communication and provides a fast path that avoids protocol processing for most messages.
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Fast-path apparatus for receiving data corresponding to a TCP connection
Laurence B. Boucher,Stephen E. J. Blightman,Peter K. Craft,David A. Higgen,Clive M. Philbrick,Daryl D. Starr +5 more
TL;DR: The Intelligent Network Interface Card (INIC) as discussed by the authors provides a fast path that avoids protocol processing for most large multi-packet messages, greatly accelerating data communication, and also assists the host for those message packets that are chosen for processing by host software layers.
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TL;DR: In this paper, an interface device is connected to a host by an I/O bus and provides hardware and processing mechanisms for accelerating data transfers between a network and a storage unit, while controlling the data transfers by the host.
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Network interface device that fast-path processes solicited session layer read commands
TL;DR: In this paper, a network interface device connected to a host provides hardware and processing mechanisms for accelerating data transfers between the host and a network, where some data transfers are processed using a dedicated fast-path whereby the protocol stack of the host performs no network layer or transport layer processing.
Patent
Intelligent Network Interface System and Method for Protocol Processing
Laurence B. Boucher,Stephen E. J. Blightman,Peter K. Craft,David A. Higgen,Clive M. Philbrick,Daryl D. Starr +5 more
TL;DR: In this article, a communication control block (CCB) for a message is defined that allows DMA controllers of the INIC to move data, free of headers, directly to or from a destination or source in the host.
References
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Book
Internetworking with TCP/IP: principles, protocols, and architecture
Douglas Comer,David L. Stevens +1 more
TL;DR: This is the first book that shows how to use the two technologies together and is still the reference for anyone who wants to work with the TCP/IP protocol suite.
Patent
Programmed I/O ethernet adapter with early interrupts for accelerating data transfer
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TL;DR: In this article, the authors propose a protocol to generate early receive interrupts when only a portion of a packet has been received from the network, so as to decrease latency and to generate a second early interrupt so that the copying of a large packet to the host may overlap reception of the packet end.
Patent
Generic high bandwidth adapter having data packet memory configured in three level hierarchy for temporary storage of variable length data packets
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TL;DR: A generic high bandwidth adapter as discussed by the authors provides a unified architecture for data communications between buses, channels, processors, switch fabrics and/or communication networks, where data is carried by data stream packets of variable lengths, and each packet includes a header control information portion required by communication protocols used to mediate the information exchange.
Patent
Buffer descriptor prefetch in network and I/O design
TL;DR: In this paper, a descriptor prefetching scheme was proposed to improve the efficiency of buffer descriptor processing by performing descriptor prefetches, where multiple descriptors are read within the same descriptor bus transaction.
Patent
Configuration of srams as logical fifos for transmit and receive of packet data
TL;DR: In this article, the first in-first out memory for transmitting (transmit FIFO) and the first-in-first-out memory (FIRO) for receiving (receive FIFOs) was introduced.