P
Paul Chang
Researcher at IBM
Publications - 59
Citations - 2841
Paul Chang is an academic researcher from IBM. The author has contributed to research in topics: Gate oxide & Field-effect transistor. The author has an hindex of 23, co-authored 57 publications receiving 2806 citations. Previous affiliations of Paul Chang include University of California, Berkeley & National Institute of Standards and Technology.
Papers
More filters
Journal ArticleDOI
Progress Toward Development of All-Printed RFID Tags: Materials, Processes, and Devices
Vivek Subramanian,Jean M. J. Fréchet,Paul Chang,D. C. Huang,J.B. Lee,Steven Molesa,Amanda R. Murphy,D.R. Redinger,Steven K. Volkman +8 more
TL;DR: Progress is reported on in developing materials, processes, and devices for the realization of ultralow-cost printed RFID tags using novel pentacene and oligothiophene precursors for pMOS and ZnO nanoparticles for nMOS.
Proceedings ArticleDOI
Printed organic transistors for ultra-low-cost RFID applications
TL;DR: In this paper, the authors report on their progress in developing materials and processes for the realization of printed transistors for low-cost RFID applications using inkjet printing of novel conductors, dielectrics, and organic semiconductors.
Journal ArticleDOI
Organic thin film transistors from a soluble oligothiophene derivative containing thermally removable solubilizing groups.
TL;DR: A symmetrical alpha,omega-substituted sexithiophene derivative containing thermally removable branched ester solubilizing groups has been prepared and offers an attractive route to easily processed and highly performing thiophene oligomers.
Patent
Methods and system for analysis and management of parametric yield
James A. Culp,Paul Chang,Dureseti Chidambarrao,Praveen Elakkumanan,Jason D. Hibbeler,Anda Mocuta +5 more
TL;DR: In this article, the impact on parametric performance of physical design choices for transistors is scored for on-current and off-current of the transistors, and the impact of the design parameters are incorporated into parameters that measure predicted shift in mean oncurrent and mean offcurrent and parameters that measured predicted increase in deviations in the distribution of on current and the offcurrent.
Patent
Nanowire mesh device and method of fabricating same
TL;DR: In this paper, a semiconductor structure is provided that includes a plurality of vertically stacked and vertically spaced apart semiconductor nanowires located on a surface of a substrate, and the source regions and the drain regions are self-aligned with the gate region.