Book ChapterDOI
System-Level Specification and Design Using VHDL: A Case Study
Wolfgang Ecker,Sabine März +1 more
- pp 505-522
TLDR
The case study demonstrates the advantages of using VHDL for system-level specification and design and describes a design path comprising both manual interaction and state-of-the-art EDA tools.Abstract:
This paper examines a sample top-down design of a simple CPU starting with a system-level specification in VHDL and ending with an RT-level VHDL description that suits a commercial synthesis tool. Based on the requirement specification captured in a natural language, the design process starts with the creation of a system-level VHDL model, continues with several partitioning steps on system level and the transformation step from system down to RT level, and proceeds over several RT-level optimizations to the final VHDL description. Some of the RT-level optimizations are new in this context . The case study demonstrates the advantages of using VHDL for system-level specification and design and describes a design path comprising both manual interaction and state-of-the-art EDA tools .read more
Citations
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Book ChapterDOI
A Survey of Programming Tools for D-Wave Quantum-Annealing Processors
Scott Pakin,Steven P. Reinhardt +1 more
TL;DR: The survey finds that tools provide potentially great leverage to enable more applications as long as the tools expose the appropriate abstractions and deliver the anticipated performance.
Proceedings ArticleDOI
Stepwise refinement of behavioral VHDL specifications by separation of synchronization and functionality
C. Schneider,Wolfgang Ecker +1 more
TL;DR: A new method of behavioral modeling consisting of separation of synchronization and functionality is presented to reduce the modeling effort in early design stages and allows early cycle based analysis to select appropriate architectures and to perform parallel/serial tradeoff.
Proceedings ArticleDOI
Specification and synthesis of bounded indirection
TL;DR: Three kinds of indirection-control state, value and net indirection -for use in different aspects of system description- are described.
Proceedings ArticleDOI
VHDL-based communication and synchronization synthesis
Wolfgang Ecker,Manfred Huber +1 more
TL;DR: This paper describes an approach for VHDL-based communication and synchronization synthesis to perform the synthesis step as a mapping step of an abstract communication or synchronization mechanism to one of a set of RT-level implementations.
Book ChapterDOI
The Design Cube: A Model for VHDL Designflow Representation and Its Application
TL;DR: Hardware design using the hardware description language VHDL has to consider three independent property scales that influence the design process from an abstract level to the gate level, namely the design view, the timing aspect, and the value representation.
References
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Journal ArticleDOI
Statecharts: A visual formalism for complex systems
TL;DR: It is intended to demonstrate here that statecharts counter many of the objections raised against conventional state diagrams, and thus appear to render specification by diagrams an attractive and plausible approach.
Journal ArticleDOI
On visual formalisms
TL;DR: The higraph, a general kind of diagramming object, forms a visual formalism of topological nature that is suited for a wide array of applications to databases, knowledge representation, and the behavioral specification of complex concurrent systems using the higraph-based language of statecharts.
Book ChapterDOI
SpecCharts : A Language for System Level Synthesis
TL;DR: The SpecCharts language was created, essentially a combination of hierarchical/concurrent state diagrams and HDL constructs that attempt to ease the conversion from system conceptualization to system specification, and also aid synthesis.