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The software vectorization handbook

Aart J. C. Bik
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The article was published on 2004-05-01 and is currently open access. It has received 54 citations till now. The article focuses on the topics: Image tracing.

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Journal ArticleDOI

Polyhedral parallel code generation for CUDA

Sven Verdoolaege, +5 more
TL;DR: A novel source-to-source compiler called PPCG is presented, which introduces a multilevel tiling strategy and a code generation scheme for the parallelization and locality optimization of imperfectly nested loops, managing memory and exposing concurrency according to the constraints of modern GPUs.
Journal ArticleDOI

Auto-vectorization of interleaved data for SIMD

Dorit Nuzman, +2 more
TL;DR: This work demonstrates an automatic compilation scheme that supports effective vectorization in the presence of interleaved data with constant strides that are powers of 2, facilitating data reorganization.
Proceedings ArticleDOI

Outer-loop vectorization: revisited for short SIMD architectures

Dorit Nuzman, +1 more
TL;DR: This paper revisit the method of outer loop vectorization, paying special attention to properties of modern short SIMD architectures, and presents an optimization tapping such opportunities, capable of further boosting the performance obtained by outer-loop vectorization to achieve average speedup factors of 5.26 and 3.64.
Proceedings ArticleDOI

Polyhedral-Model Guided Loop-Nest Auto-Vectorization

Konrad Trifunovic, +4 more
TL;DR: This paper examines the interactions between loop transformations of the polyhedral compilation framework and subsequent vectorization optimizations targeting fine-grain SIMD data-level parallelism, and demonstrates the feasibility and benefit of tuning thepolyhedral model in the context of vectorization.
Proceedings ArticleDOI

Multi-platform Auto-vectorization

Dorit Nuzman, +1 more
TL;DR: This paper presents an automatic vectorizer as implemented in GCC, the most multi-targetable compiler available today, and demonstrates how the vectorization scheme is suited to a variety of SIMD architectures.