Journal ArticleDOI
Threaded code
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The concept of “threaded code” is presented as an alternative to machine language code and hardware and software realizations of it are given.Abstract:
The concept of “threaded code” is presented as an alternative to machine language code. Hardware and software realizations of it are given. In software it is realized as interpretive code not needing an interpreter. Extensions and optimizations are mentioned.read more
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Journal ArticleDOI
An architecture for the direct execution of the Forth programming language
TL;DR: A simple direct execution architecture for a 32 bit Forth microprocessor that can directly access a linear address space of over 4 gigawords and on-chip stack caches allow most Forth primitives to execute in a single cycle.
Proceedings ArticleDOI
Combining stack caching with dynamic superinstructions
M. Anton Ertl,David Gregg +1 more
TL;DR: This paper describes an implementation of static stack caching employingDynamic superinstructions, and represents empirical results for the implementation, resulting in a speedup of up to 58% over a version that keeps one value in registers all the time.
Book ChapterDOI
Directly-Executable Earley Parsing
John Aycock,R. Nigel Horspool +1 more
TL;DR: This work describes how to narrow the performance gap between general and deterministic parsers, constructing a directly-executable Earley parser that can reach speeds comparable to deterministic methods even on grammars for commonly-used programming languages.
Journal ArticleDOI
Cache behavior of combinator graph reduction
TL;DR: A conclusion is made that combinator-graph reduction using TIGRE runs most efficiently when using a cache memory with an allocate-on-write-miss strategy, moderately large block size (preferably with subblock placement), and copy-back memory updates.
Journal ArticleDOI
Native Simulation of MPSoC Using Hardware-Assisted Virtualization
TL;DR: This work proposes the addition of a transparent address space translation layer to separate the target address space from the host simulator one, and exploits the hardware-assisted virtualization technology now available on most general-purpose processors.