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Journal ArticleDOI

Toward Verifying Nonlinear Integer Arithmetic

Paul Beame, +1 more
- 14 Jun 2019 - 
- Vol. 66, Iss: 3, pp 22
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TLDR
NO(1) size regular resolution proofs for arbitrary degree 2 identities on array, diagonal, and Booth multipliers and nO(log n) size proofs for these identities on Wallace tree multipliers are given.
Abstract
We eliminate a key roadblock to efficient verification of nonlinear integer arithmetic using CDCL SAT solvers, by showing how to construct short resolution proofs for many properties of the most widely used multiplier circuits. Such short proofs were conjectured not to exist. More precisely, we give nO(1) size regular resolution proofs for arbitrary degree 2 identities on array, diagonal, and Booth multipliers and nO(log n) size proofs for these identities on Wallace tree multipliers.

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Citations
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Book ChapterDOI

Towards Verifying Nonlinear Integer Arithmetic

TL;DR: A key roadblock to efficient verification of nonlinear integer arithmetic using CDCL SAT solvers is eliminated, by showing how to construct short resolution proofs for many properties of the most widely used multiplier circuits.
Journal ArticleDOI

Formal verification of multiplier circuits using computer algebra

Daniela Kaufmann
- 24 Jun 2022 - 
TL;DR: This thesis examines and develops automated reasoning approaches based on computer algebra and provides an algebraic proof calculus in this thesis that allows obtaining certificates as a by-product of circuit verification in order to boost confidence in the outcomes of automated reasoning tools.
Proceedings ArticleDOI

SAT, Computer Algebra, Multipliers

TL;DR: This paper focuses on the implementation details of the implementation of the new dedicated reduction engine, which not only allows fully automated adder substitution, but also employs polynomial reduction efficiently.
Proceedings ArticleDOI

Automated Synthesis of Quantum Circuits Using Symbolic Abstractions and Decision Procedures

TL;DR: A new methodology called Quantum Automated Synthesizer (QUASH) that can automatically synthesize quantum circuits using decision procedures that perform symbolic reasoning for combinatorial search and is a step towards the automation of quantum algorithm design.
Journal ArticleDOI

Verifying Whiley Programs with Boogie

TL;DR: In this article , the authors explore the use of Boogie as an intermediate verification language for verifying programs in Whiley, and demonstrate that the resulting verification tool can verify significantly more programs than the native Whiley verifier.
References
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Journal ArticleDOI

Graph-Based Algorithms for Boolean Function Manipulation

TL;DR: In this paper, the authors present a data structure for representing Boolean functions and an associated set of manipulation algorithms, which have time complexity proportional to the sizes of the graphs being operated on, and hence are quite efficient as long as the graphs do not grow too large.
Book ChapterDOI

Z3: an efficient SMT solver

TL;DR: Z3 is a new and efficient SMT Solver freely available from Microsoft Research that is used in various software verification and analysis applications.
Book

A machine program for theorem-proving

TL;DR: The programming of a proof procedure is discussed in connection with trial runs and possible improvements.
Proceedings ArticleDOI

Chaff: engineering an efficient SAT solver

TL;DR: The development of a new complete solver, Chaff, is described which achieves significant performance gains through careful engineering of all aspects of the search-especially a particularly efficient implementation of Boolean constraint propagation (BCP) and a novel low overhead decision strategy.
Journal ArticleDOI

A Computing Procedure for Quantification Theory

Martin Davis, +1 more
- 01 Jul 1960 - 
TL;DR: In the present paper, a uniform proof procedure for quantification theory is given which is feasible for use with some rather complicated formulas and which does not ordinarily lead to exponentiation.
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