Patent
VCO circuit with wide output frequency range and PLL circuit with the VCO circuit
Yoshiaki Ito,Ota Yoshiyuki +1 more
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TLDR
In this article, a voltage-controlled oscillating circuit with a bias voltage generating circuit and a ring oscillator was proposed to suppress the influence of a high frequency component overlapped on the power source voltage.Abstract:
A voltage-controlled oscillating circuit according to the present invention includes: a bias voltage generating circuit outputting a bias voltage according to a control voltage; and a ring oscillator circuit receiving supply of the bias voltage to operate. The bias voltage generating circuit generates the bias voltage using a feedback circuit formed by an operational amplifier receiving supply of a power source voltage to operate. Therefore, an influence of a high frequency component overlapped on the power source voltage, that is an influence of noise, is suppressed, thereby enabling stable generation of an output clock having a small variation in phase.read more
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Patent
Switch Circuit and Method of Switching Radio Frequency Signals
Mark L. Burgener,James S. Cable +1 more
TL;DR: In this paper, a fully integrated RF switch is described including control logic and a negative voltage generator with the RF switch elements, which includes an oscillator, a charge pump, CMOS logic circuitry, level-shifting and voltage divider circuits, and an RF buffer circuit.
Patent
Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink
Christopher N. Brindle,Michael A. Stuber,Dylan J. Kelly,Clint L. Kemerling,George P. Imthurn,Robert B. Welstand,Mark L. Burgener +6 more
TL;DR: In this article, a method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) was described, which can be adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFs, thereby yielding improvements in FET performance.
Patent
Method and apparatus for use in digitally tuning a capacitor in an integrated circuit device
TL;DR: In this paper, a method and apparatus for use in a digitally tuning a capacitor in an integrated circuit device is described, which facilitates digitally controlling capacitance applied between a first and second terminal.
Patent
Integrated RF front end with stacked transistor switch
Mark L. Burgener,James S. Cable +1 more
TL;DR: In this article, an iClass PA architecture is described that dissipatively terminates unwanted harmonics of the PA output signal, and a preferred embodiment of the RF transceiver IC includes two distinct PA circuits, two distinct receive signal amplifier circuits and a fourway antenna switch to selectably couple a single antenna connection to any one of the four circuits.
Patent
Method and Apparatus Improving Gate Oxide Reliability by Controlling Accumulated Charge
Michael A. Stuber,Christopher N. Brindle,Dylan J. Kelly,Clint L. Kemerling,George P. Imthurn,Robert B. Welstand,Mark L. Burgener,Alexander Dribinsky,Tae Youn Kim +8 more
TL;DR: In this article, a method and apparatus for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques is presented.
References
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Proceedings ArticleDOI
Adaptive bandwidth DLLs and PLLs using regulated supply CMOS buffers
TL;DR: In this paper, a technique for designing DLLs and PLLs using CMOS buffers with a regulated supply is presented, which achieves a wide bandwidth that tracks the operating frequency, a constant damping factor, large operating range and low noise sensitivity.
Patent
Integrated charge-pump phase-locked loop circuit
TL;DR: In this paper, a variable bandwidth phase-locked loop clock generator circuit is presented, which includes a phase comparator which presents pump-up and pump-down signals, indicating the polarity of the desired frequency change.
Patent
Semiconductor device realizing internal operational factor corresponding to an external operational factor stably regardless of fluctuation of the external operational factor
TL;DR: In this article, a difference adjusting circuit is used to detect the difference in at least one of phase and frequency between an external clock signal and an internal clock signal, and a current control circuit is designed to adjust the driving current of an internal power supply generator.
Patent
PLL clock generator integrated with microprocessor
TL;DR: In this article, a PLL based deskewed clock generator is described. But the clock generator has a skew of less than 0.1 ns with peak to peak jitter of 0.3 ns using 0.8 μm CMOS technology.
Patent
Power supply regulator circuit for voltage-controlled oscillator
TL;DR: In this paper, a power supply regulator circuit with increased rejection of variations and noise in power supply voltage is proposed to isolate a voltage-controlled oscillator from such power supply variations and noises.