Journal ArticleDOI
VLSI Processor Architecture
TLDR
In a VLSI implementation of an architecture, many problems can arise from the base technology and its limitations, so the architects must be aware of these limitations and understand their implications at the instruction set level.Abstract:
A processor architecture attempts to compromise between the needs of programs hosted on the architecture and the performance attainable in implementing the architecture. The needs of programs are most accurately reflected by the dynamic use of the instruction set as the target for a high level language compiler. In VLSI, the issue of implementation of an instruction set architecture is significant in determining the features of the architecture. Recent processor architectures have focused on two major trends: large microcoded instruction sets and simplified, or reduced, instruction sets. The attractiveness of these two approaches is affected by the choice of a single-chip implementation. The two different styles require different tradeoffs to attain an implementation in silicon with a reasonable area. The two styles consume the chip area for different purposes, thus achieving performance by different strategies. In a VLSI implementation of an architecture, many problems can arise from the base technology and its limitations. Although circuit design techniques can help alleviate many of these problems, the architects must be aware of these limitations and understand their implications at the instruction set level.read more
Citations
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Journal ArticleDOI
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Journal ArticleDOI
Concurrent VLSI Architectures
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Cache performance of operating system and multiprogramming workloads
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References
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Book
Smalltalk-80: The Language and its Implementation
Adele E. Goldberg,David Robson +1 more
TL;DR: This book is the first detailed account of the Smalltalk-80 system and is divided into four major parts: an overview of the concepts and syntax of the programming language, a specification of the system's functionality, and an example of the design and implementation of a moderate-size application.
Journal ArticleDOI
Cache Memories
TL;DR: Specific aspects of cache memories investigated include: the cache fetch algorithm (demand versus prefetch), the placement and replacement algorithms, line size, store-through versus copy-back updating of main memory, cold-start versus warm-start miss ratios, mulhcache consistency, the effect of input /output through the cache, the behavior of split data/instruction caches, and cache size.
Journal ArticleDOI
Capability-based addressing
TL;DR: A computer using capability-based addressing may be substantially superior to present systems on the basis of protection, simplicity of programming conventions, and efficient implementation.
Journal ArticleDOI
A vlsi risc
Patterson,Sequin +1 more
TL;DR: The hypothesis is that by reducing the instruction set one can design a suitable VLSI architecture that uses scarce resources more effectively than a CISC, and expects this approach to reduce design time, design errors, and the execution time of individual instructions.
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