Showing papers on "Circuit switching published in 1981"

A Survey of Interconnection Networks

Abstract: Concurrent processing depends on interconnection networks for communication among processors and memory modules. Various network topologies and switching strategies are covered here.

Delay Related Issues in Integrated Voice and Data Networks

Abstract: This paper focuses on network delays as they apply to voice traffic. First the nature of the delay problem is discussed and this is followed by a review of enhanced circuit, packet, and hybrid switching techniques: these include fast circuit switching (FCS), virtual circuit switching (VCS), buffered speech interpolation (SI), packetized virtual circuit (PVC), cut-through switching (CTS), composite packets, and various frame management strategies for hybrid switching. In particular, the concept of introducing delay to resolve contention in SI is emphasized, and when applied to both voice talkspurts and data messages, forms a basis for a relatively new approach to network design called transparent message switching (TMS). This approach and its potential performance advantages are reviewed in terms of packet structure, multiplexing scheme, network topology, and network protocols. The paper then deals more specifically with the impact of variable delays on voice traffic. In this regard the importance of generating and preserving appropriate length speech talkspurts in order to mitigate the effects of variable network delay is emphasized. The results indicate that a desirable length of talkspurt "hangover" of about 200 ms will accomplish this without unduly affecting speech activity, and that, under these circumstances, the perceptable threshold of variable talkspurt delay can be as high as about 200 ms average. As such, the results provide a useful guideline for integrated services system designers. Finally, suggestions are made for further studies on performance analysis and subjective evaluation of advanced integrated services systems.

Packet Switching Interconnection Networks for Modular Systems

Abstract: Adding buffers to a packet switching network can increase throughput in certain system architectures. A word of warning—don't make them too large.

Design and Validation of a Connection Network for Many-Processor Multiprocessor Systems

Abstract: Distributed control and circuit switching are the keys to fast access in the many-processor to many-memory-module connection network proposed for the Numerical Aerodynamic Simulator.

Modular telecommunication system

Abstract: A modular telecommunication system comprises a plurality of switching blocks and a plurality of inter-connecting lines for interconnecting the switching blocks. Each of the switching blocks includes a multiplicity of line terminators each adapted to be connected to a respective data terminal. A communications controller is provided in each switching block for controlling local data exchange between pairs of line terminators connected thereto across real channels. A virtual channel controller is connected to the communications controller and controls remote data exchange across interconnecting lines via virtual channels between a locally associated data terminal and a data terminal associated with a different switching block. A central processing system is connected to the virtual channel controller and controls setting up switching operations within both the virtual channel controller and the communications controller. Interface units are arranged between the virtual channel controller and a respective one of the inter-connecting lines for providing remote data exchange between data terminals each associated with a different switching block. The virtual channel controller above all is a switching unit for routing information transfers from one of the devices connected thereto to one of the others and is provided with a direction memory for storing address control information for controlling communication links across the virtual channels.

Efficiency switching-mode power supply

Abstract: A switching-mode, blocking oscillator based power supply employs proportional base drive and an improved design of rise-time suppression to improve effeciency and reliability. Current limiting elements cooperate with pass transistor control circuits to provide abrupt and power-efficient primary circuit switching.

Some Complexity Results in the Design of Deadlock-Free Packet Switching Networks

Abstract: Deadlocks are very serious system failures and have been observed in existing packet switching networks (PSN’s). Several problems related to the design of deadlock-free PSN’s are investigated here. Polynomial-time algorithms are given for some of these problems, but most of them are shown to be NP-complete or NP-hard, and therefore polynomial-time algorithms are not likely to be found.

Distributed switching system

Abstract: A distributed switching system is disclosed which includes a plurality of simple-function switching units interconnected by speech path links, each unit having a speech-path switch, a plurality of processing units connected to speech-paths for use in signal and call processing, and an inter-unit bus for the connection between the switching units and the processing units, and functions as a single large switching system as a whole.

Routing, Flow, and Congestion Control in the Datapac Network

Abstract: Datapac is the TransCanada Telephone System's public packet-switched network, based on the Northern Telecom SL-10 Packet Switching System. The primary packet-switched communications facility offered by the SL-10 in Datapac is a virtual circuit service for which several types of customer interfaces are available. The virtual circuit service relies on a datagram facility for basic internodal communications. This paper characterizes the virtual circuit and datagram communications layer of Datapac and presents the routing, flow, and congestion control techniques currently in place for these two layers. Also, the additional measures used to control international virtual circuits are discussed.

Packet communication of online speech

Abstract: The rapid progress of both communication and processing technologies in recent years constitutes a challenging technological revolution, epitomized by the photographs sent by Voyager from Saturn.This revolution offers new opportunities for many avenues of technology. Real-time speech communication is one of them. This paper discusses the use of packet switching, the emerging computer communication technology, for online speech application.The paper reviews the computer communication technologies such as packet and circuit switching, datagrams, and virtual circuits. It mentions the voice encoding (vocoding) algorithms and their implementation and discusses the interaction of vocoding and packet-switching technology. It argues about the issues of network voice protocols and introduces applications of online speech.After describing the experience with packet speech, the paper concludes with several ideas about the future of the field.

Combined circuit and packet switched system

Abstract: A new type of exchange system is disclosed which is suitable for the use in a facsimile communication system in which a large amount of information is transmitted in one direction, and the opposite direction has a small amount of information to be transmitted. According to the present invention, said large amount of information is transmitted using a circuit switching technique which assigns a fixed circuit to the forward direction to transmit said information, and a control signal or an acknowledgement signal in the backward direction from the receiving terminal, is handled through a packet switching technique in which a plurality of calls share a single transmission line or a time slot. Thus, a transmission line is used with the same efficiency as packet switching although information is transmitted mainly in one direction, and the switching load of the exchange is as small as in circuit switching.

On the design of interconnection networks for parallel and multiprocessor systems

Abstract: This thesis proposes two network configurations for parallel and multiprocessor systems. They are basically shuffle-exchange type of networks. One of them uses the principles of circuit switching networks, the other uses the principles of packet switching networks. The capabilities and performances of the networks using various control algorithms are also discussed.

Wide-sense nonblocking network made of square switches

Abstract: An example of theoretical interest is given, of a connecting network with no expansion which is nonblocking in the wide sense, ie if and only if the right routing algorithm is used

Packet-based telecommunication network

Abstract: Multiservice packet telecommunication network. It comprises a plurality of subscriber's stations each having a plurality of digital data sources and digital data receivers and data switching networks connected to said stations and therebetween through incoming and outgoing data links. The data are formed in packets having an information field, an address field and a start word and end word field. The address field is fulfilled by a plurality of operations to be controlled in the packet switching networks along the packet route. Each address is cleared when the switching operation which it defines is achieved. The switching operations are made in real time due to the lay out of equipments inserted in the incoming channels to the switching networks.

530V Integrated gated diode switch for telecommunications

Abstract: The objective of this work is to develop a new solid state crosspoint switch for telecommunications circuits. The switch is fully integrated into 580V monolithic circuits with appropriate control circuitry. Integrated arrays, packaged in hermetic chip carriers, perform the high level line circuit switching functions previously realized with arrays of electro-mechanical crosspoints. The Gated Diode Switch (GDS) is a dielectrically isolated lateral P+πPN+diode with a diffused gate on the planar surface and an MOS gate (consisting of the isolation oxide and polycrystalline substrate) on the lower boundary. With the center gate structure it achieves 530V bilateral blocking, very low crosstalk, insensitivity to transients and full current break capability. Two switches, each 0.15mm2, can be connected in antiparallel to realize a bidirectional current capability of 120mA DC and 500mA surge. Electron and hole injection produces conductivity modulation in the π-type tub to realize an incremental on resistance of 18 ohms and a forward voltage of 1.7V at 30mA. The paper describes the properties of the GDS when it is maintaining the off state, turning on and breaking current. The paper also establishes the requirements this switch places on its integrated control circuit. Integrated arrays containing four pairs of bilateral crosspoint switches have been developed for the subscriber line interface circuits of a large digital electronic switching system, #5 ESS.

Time-division multiplex switching network

Abstract: A time-division multiplex switching network is constructed of units designed as time stages which operate blocking-free and which are multiply divided. A plurality of units of identical structure to a plurality of switching units of a switching network portion is assigned to each switching network portion, the plurality of units being operated as multiplexers at which the outgoing time-division multiplex lines are connected and whose normally non-utilized outputs can be connected by way of switches to other time-division multiplex lines extending from other switching network portions. Upon failure of the latter switching network portions, the switches are closed for rerouting the traffic through the system.

Signalling switching system in a time switching network and time switching network incorporating such a system

Abstract: The system is constituted by a wired logic included in a signalling unit, which also has a microcomputer. This logic is connected on the one hand to the incoming and outgoing signalling junctions of a connection network and on the other to a programmed peripheral marking unit by means of which a central computer supplies correspondence data between an incoming junction channel and an outgoing junction channel.

Circuit switching unit

Abstract: PURPOSE:To facilitate opeation by sharing a network controller for subscriber's circuits dueing leased line connection with regard to data communication. CONSTITUTION:To the connection point between two-wire and four-wire leased circuits PL, facsimile unit 20 is connected via circuit switching unit 30 and unit 3 makes a switching connection with subscriber's telephone circuit LN. In facsimile communication by circuit LN, transmission and reception are both performed by unit 20 having normal MA type network controller 1. When leased-line selection switch 25 of unit 30 is operated in transmission to circuit PL, modem 2 is connected to four-wire leased line PL via PD22 and also to two-wire leased line PL via PD24. In incoming from leased line PL, a call signal is detected and sequence control circuit 32 changes unit 20 over from circuit LN to PL. Thus, unit 1 can be shared between circuits LN and PL.

Automatic outgoing device

Abstract: PURPOSE:To prevent a delay of alarm transmission, by generating a notice signal tone from an alarm detecting circuit in busy mode of the telephone and then transmitting the notice signal to the in service or outgoing subscriber. CONSTITUTION:In case the telephone 7 is busy when the alarm detecting circuit 3 detects the occurrence of an alarm, the control circuit 14 starts the notice signal tone generating circuit 11 and thus gives a notice signal tone to both the subscriber telephone 7 and the other side of talking to inform them that the call has to be discontinued due to the occurrence of an alarm information. When the subscriber is on- hook, the microprocessor 14-1 detects this state and then switches the circuit switch circuit 12 to the signal transmitter 6. Then the processor 14-1 starts the automatic outgoing circuit 15 to call out the monitor center 4. Thus the alarm information is transmitted.

Pcm switching element

Abstract: A PCM switching element intended to be used in digital telephone exchanges for the making of switching or concentration stages of whatever capacity can be controlled by a commercially available microprocessor and can be made as an integrated circuit. Structures consisting of a plurality of such elements are readily designed owing to the use of a "busy" bit associated with each outgoing PCM channel.

Time-division switching network

Abstract: not available for EP0039077Abstract of corresponding document: US4398285A time-division multiplex switching network is constructed of units designed as time stages which operate blocking-free and which are multiply divided. A plurality of units of identical structure to a plurality of switching units of a switching network portion is assigned to each switching network portion, the plurality of units being operated as multiplexers at which the outgoing time-division multiplex lines are connected and whose normally non-utilized outputs can be connected by way of switches to other time-division multiplex lines extending from other switching network portions. Upon failure of the latter switching network portions, the switches are closed for rerouting the traffic through the system.

Duplex data reception system

Abstract: PURPOSE:To prevent the absence of received data in circuit switching by setting data from each circuit in a data buffer in each computer and by comparing it with the last received data in a common external storage device. CONSTITUTION:Data inputted from respective circuits are set in buffers 1 and 2 in computers A6 and B7, and then compared with the last received data in common external storage device 5. The information to be compared is a serial number given at the head of each data and when the difference between [this-time input data serial number] and [last received data serial number] is ''1'', the input data of a corresponding circuit is considered to be the first-comer and set in the received data area of device 5. Thus, the absence of received data in circuit switching is prevented.

A versatile queueing model for data switching

Abstract: In a data network, when messages arrive at a switch to be served (transmitted) on a line, it seems reasonable to assume that the arrival process can be described as a Poisson (random) process However, when messages are divided into a number of packets of a maximum length, these packets arrive bunched together This gives rise to what is referred to as “peaked” traffic The degree of peakedness depends on 1) the interarrival time of packets associated with a particular message and 2) the distribution of the number of packets per message In this paper we describe a queueing model which accounts for the non-Poissonian nature of the packet arrival process as a function of these two factors Since packets are of a fixed maximum length, the model assumes that the packet service time is constant, as opposed to the mathematically more tractable but less realistic assumption of exponentially-distributed service time This queueing model is then used to describe the network delay as affected by: 1 Message switching versus packet switching, 2 A priority discipline in the queues, 3 Packet interarrival time per message, which is probably controlled by the line speed at the packet origination point, and 4 A network which carries only short inquiry-response traffic as opposed to a network which also carries longer low-priority printer traffic The general conclusions are that the peakedness in the arrival process caused by a short interarrival time of packets per message and the longer printer traffic would cause excessive delays in a network If inquiry-response traffic with a short response-time requirement is also to be carried on the same network a priority discipline has considerable value Message switching for such a combination of traffic should be avoided

Circuit arrangement for TDM-telecommunications exchanges, in particular PCM-telephone exchanges with data channels between a central control unit and decentralised control equipment

Abstract: 1. A circuit arrangement for centrally controlled t.d.m. telecommunications exchange systems, in particular PCM telephone exchange systems, with a multi-stage switching network (K) which has t.d.m. inputs and t.d.m. outputs, and with a plurality of connection devices (LTG1, LTG2, LTGn) which serve to connect t.d.m. connection lines, analogue connection lines and/or analogue subscriber lines, each of which (e.g. LTG1) is connected to a t.d.m. input (A1) and a t.d.m. output (A2) of the switching network, and with at least one central control unit (ZW) and with a plurality of decentral control devices (TE1, TE2, TEn) which are individually assigned to the connection devices (LTG1, LTG2, LTGn) and which are connected to the control unit (ZW) via data channels (m ...) which are switched through via the switching network (K), are constantly maintained in readiness for transmission, and which extend via the switching network (K) in such manner that each of the t.d.m. inputs (A1) and each of the t.d.m. outputs (A2) of the switching network (K), and each of its t.d.m. intermediate lines carries at least one data channel, and with a control unit-connection device (MB/ML) which is assigned to the control unit (ZW) and is connected thereto and which is connected to the switching network (K) in the same way as the other connection devices (LTG1, LTG2, LTGn), and via which the control unit (ZW) exchanges data with the control devices (TE1, TE2, TEn) of the other connection devices (LTG1, LTG2, LTGn) in a system of data exchange which includes all the data channels and which serves to monitor the functioning capacity of all the t.d.m. intermediate lines of the switching network (K), characterised in that the switching network (K) is constructed from uni-directional t.d.m. switching devices (RZE R RZA) and uni-directional t.d.m. intermediate lines, that the control unit connection device (MB/ML) is connected via a t.d.m. input and a t.d.m. output of the switching network (K) only to one t.d.m. switching device of the first switching stage (RZE) and one t.d.m. switching device of the last switching stage (RZA), that the data channels, which are switched through from the control unit (ZW) to the control devices (TE1, TE2, TEn) extend via t.d.m. intermediate lines which extend out from the t.d.m. switching device, connected to the control unit connection device (MB/ML), of the first switching stage (RZE) to each of the t.d.m. switching devices which are located at a specific interface (R) within the switching network (K), that the data channels which are switched through from the control devices (TE1, TE2, TEn) to the control unit (ZW) extend via t.d.m. intermediate lines which converge from each of the aforementioned t.d.m. switching devices at the specific interface (R), to the t.d.m. output, which is connected to the control unit connection device (MB/ML), of the t.d.m. switching device of the last switching stage (RZA), that the data channels which are switched through from the control devices (TE1, TE2, TEn) to the control unit (ZW) extend via t.d.m. intermediate lines which extend out from each of the t.d.m. switching devices of the first switching stage (RZE) to all the t.d.m. switching devices which are located at the specific interface (R) within the switching network (K), and that the data channels which are switched through from the control unit (ZW) to the control devices (TE1, TE2, TEn) extend via t.d.m. intermediate lines which converge from all the t.d.m. switching devices at the specific interface (R) within the switching network (K), to each of the t.d.m. switching devices of the last switching stage (RZA).

DTMF Activated remote telephone line switching and testing

Abstract: DTMF (dual-tone multi-frequency) activated apparatus for remote switching and testing of a four-wire telephone line system is disclosed. The telephone line provides four-wire service between a first location and a plurality of second remote locations. By using a standard twelve button or expanded sixteen button telephone DTMF key pad, the switching and testing apparatus provides the capability at the first location of controlling switching circuits at any one of the remote locations. Each remote switching and testing circuit is provided with a DTMF detector and digital logic responsive to the detector for recognizing an assigned address code and any one of the command codes corresponding to the looped mode, the terminated mode, the milliwatt source mode, and the in-data mode. A programmable three digit address, for example, allows use of up to one thousand switching and testing circuits on one line. When the digital logic of a switching and testing circuit recognizes its assigned address, the circuit is enabled to respond to a following command code which causes the circuit to assume the corresponding mode. In addition to the four codes for each of the four modes of the switching and testing circuit, there is a "master reset" code which allows all units, or all units within a group, to be returned to the in-data mode.

Digital Microcommutators: Structure and Application

Abstract: Semiconductor technology achievements have opened up prospects for the development of integrated digital communication networks. Special LSI's have become a base element of communication means. Here, an approach is described for special LSI'sdesigned in the form of functionally complete communication systems of limited capacity-the microcommutators. The microcommutator contains all the subsystems of a switching system which thus make it possible to increase the switching system capacity by connecting the required number of microcommutators. The increase in microcommutator capacity can be achieved through the use of a space-time channel division structure. It is shown that the multistage space-divided microcommutators are preferable for the minimization of microcommutator nomenclature and the unification of a switching network of different capacity. An indication for the need for switching system synchronization is the shortage of space-divided switching networks based on space-time-divided microcommutators. An example of the performance of a local switching system with concentrators is given.

Digital radio circuit switching system

Abstract: PURPOSE:To obtain a digital radio circuit switching system, by which a circuit is not cut off instantaneously, that is to say, the bit synchronizing frame is not out of synchronizm, at the time of switching, in the digital transmission system which is equipped with both the existing (n) and stand-by (m) circuits. CONSTITUTION:DIV is a branch power board for making the existing circuit branch to the stand-by circuit, TX SW is a sending-end parallel switch for simultaneously sending out a signal of the existing circuit to the stand-by circuit, TX DPU is a transmission code converter for inserting a circuit monitoring signal and a frame pulse, and RX DPU is a receiving code coverter for removing a circuit monitoring signal and a frame pulse, and detecting a circuit monitoring signal. Now, in case when the bits between each system are stepped out, they are pulled in by the TX DPU. And, when a fault has been detected, the fault information is sent out to the receiving end AS, and the receiving-end change-over switch RX SW is operated immediately.

Optimal Digital Switching Introduction Into the Local Network

Abstract: This paper describes a local network evolution model for digital switching introduction and the associated algorithm used to determine a feasible optimal network evolution policy. Such a policy is defined by the type, location, and time of placement of digital switches and remote concentrators as well as the homing pattern, i.e., the assignment of concentrators to digital switches. In addition, the evolution policy is characterized by the mode in which the digital switch or remote concentrator is used. Two modes are considered here: 1) overlay where analog equipment is retained at a switching center, growth as well as potentially removed analog lines being served by digital eqmpment; and 2) replacement where analog switches are replaced by digital equipment. The basic cash flows considered in the economic analysis correspond to switching, trunking, and interface costs. Optimality is understood here in terms of minimizing an economic criterion such as the present worth of annual Charges (PWAC) or net present value (NPV). Results obtained using the optimization algorithm in conjunction with a real local telephone exchange network are also presented.

Data collection, storage and transmission system - uses multiplexer to allow transmission via telephone line to central processor through MODEM and interface

Abstract: The device is connected to the processor by a telephone line. A telephone network connection circuit is linked to a processing unit which is also connected to the data providing devices. The network connection circuit includes a call detector and a call circuit connected to a network line, this line adjoining a network junction which is connected to a 2 wire/4 hybrid circuit. The reception output of this circuit is connected to a reception filter. The transmission input is connected both to a data transmission filter and to a tone transmission filter. The processing unit comprises a microprocessor connected by a bus to program memories and data memories, a multiplexer and a time reference circuit. The system may be used for transmission of data relating to temp., presence etc.