Showing papers on "Electronic design automation published in 1981"

Optimal Layout of CMOS Functional Arrays

Abstract: Designers of MOS LSI circuits can take advantage of complex functional cells in order to achieve better performance. This paper discusses the implementation of a random logic function on an array of CMOS transistors. A graph-theoretical algorithm which minimizes the size of an array is presented. This method is useful for the design of cells used in conventional design automation systems.

A design methodology and computer aids for digital VLSI systems

Abstract: The current status of a research program at Carnegie-Mellon University aimed at the formulation of a hierarchical design methodology for digital VLSI circuits is described In addition, this paper describes a set of computer aids which supports this methodology One of the goals of this work is to provide a design environment which allows for a significant reduction in time between the initial concept of a complex digital system and the generation of masks Another goal is to allow the designer to efficiently explore a number of design alternatives

Database facilities for engineering design

Abstract: As the complexity of engineering design projects increases and the objectives for their performance become more demanding, there is growing interest in integrated databases that support a broad range of applications and various forms of automated entry. This paper is a tutorial on the design and implementation of integrated design databases. It addresses a variety of functional issues, including subsystem integration, maintaining consistency among concurrent users and various system architectures.

LSI logic testing — An overview

Abstract: The development of large scale integration (LSI) testing is reviewed. The paper concentrates on the testing of logic components and presents in-depth discussions of the methods of fault modeling, test pattern generation, fault simulation, and design for testability. It is shown how these methods are used in the design of components and how they can be used in support of design automation. Finally, a brief account of test equipment and test data preparation is given.

A Parallel Bit Map Processor Architecture for DA Algorithms

Abstract: Bit maps have been used in many Design Automation (DA) algorithms such as printed circuit board (PCB) layout and integrated circuit (IC) design rule checking (DRC). The attraction of bit maps is that they provide a direct representation of two-dimensional images. The difficulty with large scale use of bit maps (e.g., for DRC on VLSI) is that the large amounts of data can consume impractical amounts of computation on sequential machines. This paper describes a processing architecture that is specifically designed to operate on bit maps. It has an inherently two-dimensional construction and has a very large parallel processing capability. Also included in this paper are descriptions of algorithms that exploit the architecture. Algorithms for routing, DRC, and bit vector manipulation are included.

A structured design methodology and associated software tools

Abstract: The problems encountered designing very large scale integrated circuits (VLSI) are fundamentally different from the problems encountered in the design of small scale integrated circuits. The differences require a new methodology of design for the new large scale circuits, and the new design methodology requires a new set of tools. The computer-aided design work at Caltech has progressed from a recognition of the inherent differences and has produced a new design methodology and a set of tools which attack the new problems in integrated circuit design.

On the Use of the Linear Assignment Algorithm in Module Placement

Abstract: This paper examines the application of the computationally powerful linear assignment algorithm to the placement problem. A brief description of the algorithm is given, followed by a discussion of its use with various problem constraints, for improving existing placements, and in a constructive-initial placement procedure. Several examples are included.

Failure mechanisms, fault hypotheses and analytical testing of LSI-NMOS (HMOS) circuits

Abstract: Describes the classification of failure mechanisms, followed by its application to both electrical and logical levels for NMOS (HMOS) technology. A link between failure analysis, from reliability physics, and test design is thus carried out. Classes for fault hypotheses are given as a function of possible occurrences of failure mechanisms, and of the ease of test generation. Test vector generation methods are illustrated, both at gate level, and at the level of typical complex circuits such as ALU, ROM and PLA. The classes of hypotheses are well defined. The future developments of analytical testing are discussed together with the evolution of the design automation of VLSI parts.

Computer-aided design of VLSI circuits

Abstract: With the rapid evolution of integrated circuit (IC) technology to larger and more complex circuits, new approaches are needed for the design and verification of these very-large-scale integrated (VLSI) circuits. A large number of design methods are currently in use. However, the evolution of these computer aids has occurred in an ad hoc manner. In most cases, computer programs have been written to solve specific problems as they have exist and no truly integrated computer-aided desisn (CAD) systems exist for the design of IC's. A structured approach both to circuit desisn and to circuit verification, as well as the development of integrated design systems, is necessary to produce cost-effective error-free VLSI circuits. This paper presents a review of the CAD techniques which have been used in the design of IC's, as well as a number of design methods to which the application of computer aids has proven most successful. The successful application of design-aids to VLSI circuits requites an evolution from these techniques and design methods.

Design automation in IBM

Abstract: Within the context of the changing design requirements of digital systems spanning the semiconductor era, this paper describes the significant steps in the development of Design Automation technology in IBM. We cover the design tools which support the design of the electronic portion of such systems. The paper emphasizes the systems approaches taken and the topics of design verification, test generation, and physical design. Descriptions of the technical contributions and interactions which have led to the unique characteristics of IBM's Design Automation systems are included.

The automatic synthesis of digital systems

Abstract: The purpose of a digital synthesis aid is to allow a digital system architect to describe the behavior of a system to be built and to then aid him in the logic design of that system. This paper will overview several different approaches to the development of synthesis aids. The importance of key features of synthesis aids, such as the automatic generation of multilevel system representations, will also be discussed.

Process modeling of integrated circuit device technology

Abstract: This paper reviews the field of computer-aided design as applied to process modeling of integrated circuit technology and devices. Device design applications for process modeling are considered for both bipolar and NMOS technologies. The kinetics of oxidation and impurity diffusion in silicon are discussed. The numerical solution of impurity diffusion is considered, including grid and time step constraints. New efforts in two-dimensional process modeling are briefly discussed along with test structure work needed for parameter estimation.

A Survey of the State of the Art of Design Automation

Abstract: Automated layout of PCBs and LSI chips is a successful operation; testing is an active area of development. DA tools, however, are seldom used in logic design.

The Modeling and Synthesis of Bus Systems

Abstract: A bus oriented interconnection of registers and data operators is the dominant mode of design for the data paths of digital systems. A study of ten processor implementations, ranging in size from microprocessors to large mainframes, spanning almost 20 years in the practice of digital design, indicated a strong similarity. From this study bus style primitives and generic bus models were developed. The generic bus models were simplified to match each of the ten processors composing the study. An algorithm for generating a bus style design is presented. The algorithm is used to generate the data paths of the PDP-11/40 resulting in lower cost and shorter delays than the original implementation. Finally, the paper concludes with a discussion of the bus synthesis algorithm's implementation and its role in the CMU functional-to-hardware Design Automation System.

A Technology Relative Logic Synthesis and Module Selection System

Abstract: The logic synthesis step of the CMU-DA system selects modules from a database for use in a digital system. This approach to logic synthesis is described. An experiment using volunteer designers was conducted to calibrate the automated system. The results indicate that the automated system produces designs that are quite close to those expected in the sample population. Design spaces for a relatively large design and two module sets (TTL and CMOS Standard Cells) are illustrated and discussed. A methodology for predicting the bounds of a design space is illustrated and discussed. The system can be used to measure the usefulness of a new module in a module set or to reimplement a design with the modules of a new technology.

Circuit Recognition and Verification Based on Layout Information

Abstract: The mathematical and technical background information for our highly efficient procedure of circuit recognition and verification from layout information is presented. Complete verification and extremely short computing times are the main goals. This procedure can be performed for bipolar as well as for MOS technologies and is part of the whole layout-control system LOCATE.

A CAD System for Logic Design Based on Frames and Demons

Abstract: A hierarchical logic design system based on frames and demons is proposed in this paper. Featuring a graphic editor which puts the design information into frames and a symbolic simulator which consists of demons (data-driven functions stored in frames), the system is flexible enough for a designer to easily add his own functions, such as monitoring functions of design constraints.

Measuring designer performance to verify design automation systems

Abstract: Design automation at the register transfer level of design is still in its infancy, and it is not yet completely understood what the appropriate measures used in direction the automated design process should be. To establish these measures, results of these design automation systems must be compared with some near optimal designs. A set of statistically based experiments is developed to estimate near optimal designs. A method is demonstrated for gathering data on designer performance, specifically at the different levels of systems design, and in general for calibration of other design automation systems where the intuitive designer still performs more capably than the present design algorithms. An analysis of variance is used to indicate the relative importance of various decisions in a system design. It is shown that the algorithm to be implemented and the hardware design style account for 90 percent of the variation in the results. Thus, selecting the design style (e.g., distributed, microprocessor, pipelined, etc.) is the most important parameter for a design automation system.

Computer-aided design in civil engineering

Abstract: The paper reviews the development and current status of computer-aided design (CAD) in structural-engineering, a branch of civil engineering. The Similarities to and differences from electrical engineering practice are emphasized. The presentation deals first with well-developed CAD application areas, namely those supporting analysis, component selection and the preparation of design documents, Problematic areas, still subject to intense research, in synthesis, optimization, the representation of design specifications, the use of databases and the role of software engineering tools are briefly described.

An Integrated Computer Aided Design System for Gate Array Masterslices: Part 2 The Layout Design System Mars-M3

Abstract: Described are the outline and the application results of a fully automatic chip layout design system which has been utilized for years for the development of over a hundred options of ECL and MOS gate arrays. The features and techniques of the placement, routing and checking subsystems as well as the chip layout model which can be treated by the system are discussed.

Tutorial Series 10 LSI/VLSI Design Automation

Abstract: Advanced design aids will increase a designer's efficiency and reduce costs. As a result, a chip will contain more of a total system design.

On Proving the Correctness of Optimizing Transformations in a Digital Design Automation System

Abstract: As part of our research for the Carnegie-Mellon University Design Automation System, we have been investigating methods for proving that the system produces correct designs from correct specifications. This paper presents a mathematical model of the behavior of hardware descriptions which has been used to prove that some of the optimizing transformations applied to abstract hardware descriptions in the system preserve behavioral equivalence. The model goes beyond the usual computational models used in program verification in that it takes into account the proper sequencing of "events" which represent interactions with the environment.

Automatic Input and Interactive Editing Systems of Logic Circuit Diagrams

Abstract: This paper discusses automatic input and interactive editing systems of logic circuit diagrams. Automatic input is based on pattern recognition, and interactive editing is executed through a graphic display. The system is implemented on a FACOM M-180 II and a PANAFACOM U-400. System overview, hardware configuration, pattern recognition algorithms, editing system, data-base, as well as current results are described.

The Cell Design System

Abstract: The Cell Design System (CDS) is part of a set of tools developed in the 1970s by the Electronics Division of Xerox to support CAD design. This paper describes the CDS, which is a highly interactive graphics system used for layout of custom chips. Described are the hardware environment and language, the kinds of manipulation allowed, types of objects, and viewing options. The CDS benefitted from experience with Icarus [1] which is an early research effort for cell design layout. As with Icarus, a strong benefit of the CDS is its availability on a personal computer, thus providing a layout capability within the office confines of the designer. Also, we feel that the CDS has provided a unique and powerful method of viewing cells and has a highly effective human interface.

Interactive computer-aided design of control systems

Abstract: We describe four computer packages for interactive computer-aided design of control systems. DIGICON (digital control) is a computer aid to the design of digital controls for single-input single-output (SISO) systems using the state-space techniques of pole and zero assignment. CONCON (continuous control) is a similar package for the design of SISO continuous systems using the same techniques. The program DOPTICON (discrete optimal control) is a computer aid for the design of discrete optimal control systems using the linear quadratic Gaussian ( LQG ) theory and OPTICON (optimal control) is its continuous-time counterpart. All four packages contain algorithms for computation of the poles and zeros of the resulting designs as well as the evaluation of the transient responses.

Graphics Language / One IBM Corporate-Wide Physical Design Data Format

Abstract: The evolution and structure of the IBM Corporate-Wide physical design data language, GL/1 (Graphics Language / One), is discussed. The need for a common graphics interface for communication among various design automation programs is demonstrated. At IBM, the same format is used from physical layout to mask generation for integrated circuit and printed circuit board designs.

VLSI design automation activities at M.I.T.

Abstract: A large part of the M.I.T. research program in very large-scale integrated circuits (VLSI) deals with design automation. Industry today is facing a "design crisis" that requires substantial advances in the state of the art in design aids. University.research such as that at M.I.T. is aimed at making such advances. The design of an integrated circuit is viewed as a series of transformations among various domains of representation for the design. Many computer tools which assist in those transformations have been developed at M.I.T. There appear to be two new design methodologies emerging which are radically different from design styles currently in use in industry.

Bolt - A Block Oriented Design Specification Language

Abstract: BOLT is a block-oriented MOS Integrated Circuit design language which relies heavily on macro, define, and parameter default features in order to simplify the design specification. A compiler generates block, logic, and transistor level equivalents used in an integrated CAD system including logic simulators, timing verification, place and route software and other packages. To handle the rapidly changing custom MOS/LSI environment the device types are defined externally to the compiler.

Custom VLSI Electrical Rule Checking in an Intelligent Terminal

Abstract: An extension to a language-based custom VLSI design approach is proposed in which the designer supplies just enough up-front semantic information to allow a substantial amount of beneficial design consistency checking with a minimum of computation. The computational load is reduced by using a bottom-up hierarchical design approach, with incremental checking as the design is built. The load is also reduced by imposing minor restrictions upon the layout designer, by requiring that all active elements be prechecked, and by attaching "type" attributes to interconnecting signals. The method is very efficient for highly "regular" designs. Checks performed are geometrical design rules, connectivity, static electrical consistency, and node rise-and-fall times.

A Design Automation System for Electronic Switching Systems

Abstract: This paper describes the development and operation experience of NTT's design automation (DA) system for analog/digital switching systems. The DA system is composed of several subsystems, such as logic design, physical design, documentation and manufacturing data conversion programs, organized around the centralized data base management system. By using this system, hardware standardization and products compatibility among different manufacturers have been achieved. The outlook for the future DA technology is also discussed.