Showing papers on "Emulation published in 2002"

An integrated experimental environment for distributed systems and networks

Abstract: Three experimental environments traditionally support network and distributed systems research: network emulators, network simulators, and live networks. The continued use of multiple approaches highlights both the value and inadequacy of each. Netbed, a descendant of Emulab, provides an experimentation facility that integrates these approaches, allowing researchers to configure and access networks composed of emulated, simulated, and wide-area nodes and links. Netbed's primary goals are ease of use, control, and realism, achieved through consistent use of virtualization and abstraction.By providing operating system-like services, such as resource allocation and scheduling, and by virtualizing heterogeneous resources, Netbed acts as a virtual machine for network experimentation. This paper presents Netbed's overall design and implementation and demonstrates its ability to improve experimental automation and efficiency. These, in turn, lead to new methods of experimentation, including automated parameter-space studies within emulation and straightforward comparisons of simulated, emulated, and wide-area scenarios.

Scalability and accuracy in a large-scale network emulator

Abstract: This paper presents ModelNet, a scalable Internet emulation environment that enables researchers to deploy unmodified software prototypes in a configurable Internet-like environment and subject them to faults and varying network conditions. Edge nodes running user-specified OS and application software are configured to route their packets through a set of ModelNet core nodes, which cooperate to subject the traffic to the bandwidth, congestion constraints, latency, and loss profile of a target network topology.This paper describes and evaluates the ModelNet architecture and its implementation, including novel techniques to balance emulation accuracy against scalability. The current ModelNet prototype is able to accurately subject thousands of instances of a distrbuted application to Internet-like conditions with gigabits of bisection bandwidth. Experiments with several large-scale distributed services demonstrate the generality and effectiveness of the infrastructure.

Debugging and performance profiling using control-dataflow graph representations with reconfigurable hardware emulation

Abstract: An embodiment of the invention includes a method of simulating a hybrid instruction processor and reconfigurable processor implemented algorithm which utilizes a runtime selectable emulation library that emulates a reconfigurable processor and its resources, and a control-data flow emulator that emulates the reconfigurable logic for the algorithm. Another embodiment of the invention includes a method of simulating a control-dataflow graph that includes building an internal representation of the control-dataflow graph that includes one or more dataflow code blocks, and simulating the control-dataflow graph as a sequence of code block dataflow executions, where control is passed from one code block to another code block based on the output value of the code block until EXIT is reached.

System for and method of streaming data to a computer in a network

Abstract: A system for and method of rapidly streaming data to one or more client devices, such as personal computers (PC's) from a server employing virtual disk emulation and broadcasting or multicasting of data residing on a network server. In some embodiments, the streamed data includes files necessary to boot and configure the one or more client devices, the data including hibernation, O/S and application files.

A method for providing system integrity and legacy environment emulation

Abstract: A method and apparatus to provide pre-boot security and legacy hardware and environment support for a computing system having an extensible firmware architecture is described. A virtual machine monitor is employed to provide the virtualization of system state for the purposes of running legacy compatibility code or protecting key data and code regions for safety and security. An application may be given access to a subset of the system resources, and access to portions of the memory map not designated for updates would trap (program interrupt) to the VMM. A VMM pre-boot policy agent may then protect state and unload any problematic software.

Network interface to a video device

Abstract: an illustrative video apparatus comprises a decoder that decodes video information in a native format, an emulation controller coupled to the decoder, and a network controller coupled to the emulation controller and capable of coupling to an external network. The video apparatus also includes a storage holding an instruction sequence executable on the emulation controller. The instruction sequence comprises a code for receiving network information from the external network and converting the network information to the native format for transfer to the decoder.

Event Model Interfaces for Heterogeneous System Analysis

Abstract: Complex embedded systems consist of hardware and software components from different domains, such as control and signal processing, many of them supplied by different IP vendors. The embedded system designer faces the challenge to integrate, optimize and verify the resulting heterogeneous systems. While format verification is available for some subproblems, the analysis of the whole system is currently limited to simulation or emulation. In this paper we tackle the analysis of global resource sharing, scheduling, and buffer sizing in heterogeneous embedded systems. For many practically used preemptive and non-preemptive hardware and software scheduling algorithms of processors and busses, semi-formal analysis techniques are known. However they cannot be used in system level analysis due to incompatibilities of their underlying event models. This paper presents a technique to couple the analysis of local scheduling strategies via an event interface model. We derive transformation rules between the most important event models and provide proofs where necessary. We use expressive examples to illustrate their application.

DELI: a new run-time control point

Abstract: The Dynamic Execution Layer Interface (DELI) offers the following unique capability: it provides fine-grain control over the execution of programs, by allowing its clients to observe and optionally manipulate every single instruction - at run time - just before it runs. DELI accomplishes this by opening up art interface to the layer between the execution of software and hardware. To avoid the slowdown, DELI caches a private copy of the executed code and always runs out of its own private cache. In addition to giving powerful control to clients, DELI opens up caching and linking to ordinary emulators and just-in-time compilers, which their get the reuse benefits of the same mechanism. For example, emulators themselves call also use other clients, to mix emulation with already existing services, native code, and other emulators. This paper describes the basic aspects of DELI, including the underlying caching and linking mechanism, the Hardware Abstraction Mechanism (HAM), the Binary-Level Translation (BLT) infrastructure, and the Application Programming Interface (API) exposed to the clients. We also cover some of the services that clients could offer through the DELI, such as ISA emulation, software patching, and sandboxing. Finally, we consider a case study of emulation in detail: the emulation of a PocketPC system on the Lx/ST210 embedded VLIW processor. In this case, DELI enables us to achieve near-native performance, and to mix-and-match native and emulated code.

Two-handed emulation: how to build non-blocking implementations of complex data-structures using DCAS

Abstract: This paper partly addresses the question of whether, in principle, there is any point in adding richer hardware synchronization primitives when the existing set is "universal", and therefore sufficient to synchronize any data structure in a non-blocking manner. The context of this paper is the ongoing investigation of the utility of adding a DCAS instruction to modern processors to aid the design and performance of non-blocking algorithms. We add one more piece of evidence in support of this instruction.In particular, we demonstrate that DCAS is sufficient to enable a technique called "two-handed emulation" which yields efficient and understandable implementations of a class of data structures. We present a non-blocking implementation of a doubly-linked list to show the basic technique. We describe a non-blocking implementation of a dynamically resizable hash-table to illustrate how the technique is amenable to optimizations that improve performance and increase concurrency.

Three Sources of Information in Social Learning

Abstract: This chapter contains sections titled: Three Sources of Information in Social Learning, Emulation and Imitation, A New, Multidimensional Framework, Conclusion, Acknowledgments, Note, References

The relationship between simulation and emulation

Abstract: This paper aims to explain how simulation and emulation are interrelated, and why they are of benefit to automatic material handling systems (AMHS) projects at different times and in different ways. More specifically, the paper documents current thinking on the use of simulation models to provide feedback to industrial control systems in order to test their logical operation prior to commissioning. The concept of what is meant by emulation in this context is defined, and the differences and similarities between emulation and simulation are detailed. Several emulation case studies are described to illustrate the use of a simulation model in this domain, and an overview of the technical background to emulation is included to aid understanding of how this is achieved. The paper concludes with a discussion of where emulation is most usefully applicable, how current standards have allowed its ready adoption to date, and possible areas of future development.

Timing-accurate Storage Emulation

Abstract: Timing-accurate storage emulation fills an important gap in the set of common performance evaluation techniques for proposed storage designs: it allows a researcher to experiment with not-yet-existing storage components in the context of real systems executing real applications. As its name suggests, a timing-accurate storage emulator appears to the system to be a real storage component with service times matching a simulation model of that component. This paper promotes timing-accurate storage emulation by describing its unique features, demonstrating its feasibility, and illustrating its value. A prototype, called the Memulator, is described and shown to produce service times within 2% of those computed by its component simulator for over 99% of requests. Two sets of measurements enabled by the Memulator illustrate its power: (1) application performance on a modern Linux system equipped with a MEMS-based storage device (no such device exists at this time), and (2) application performance on a modern Linux system equipped with a disk whose firmware has been modified (we have no access to firmware source code).

A dynamic network scenario emulation tool

Abstract: Comparative performance measurements of distributed applications and network protocols require the availability of appropriate network environments. Network emulation approaches offer a flexible way to mimic the properties of a variety of networks. Existing emulation tools work either with centralized real-time simulation components, limiting the scenario size and maximum traffic, or focus on the emulation of some network properties at a single point. We propose a tool for the realistic emulation of network links, and show how several emulated links can be combined to reproduce a comprehensive network model. In addition to that, the model can include changing network properties, e.g. emerging from mobile communication partners. This facilitates the distributed emulation of a comprehensive, dynamic network scenario to support repeatable performance measurements.

System and method for emulating a surface EKG using an implantable cardiac stimulation device

Abstract: A surface electrocardiogram (EKG) is emulated using signals detected by the internal leads of an implanted device. The emulation is performed using a matrix-based technique that separately emulates each of the individual signals of a multiple-lead EKG, rather than merely emulating a single combined EKG. In one example, each of the twelve signals of a standard 12-lead EKG are individually emulated, allowing for separate processing and display. The emulation technique takes into account factors affecting the relative locations of the internal leads, such as respiration and posture, to thereby provide a more accurate emulation. A calibration technique is provided for calibrating the EKG emulation for use with a particular patient and a verification technique is provided for automatically verifying the reliability of the emulation. Any significant loss in emulation reliability is likely caused by lead dislodgment and so automatic detection of possible lead dislodgment is also achieved.

Program-controlled unit

Abstract: A program-controlled unit includes a selection device which can determine whether the program-controlled unit is to be emulated by using a first emulation unit or by using a second emulation unit. As a result, it is possible to provide a mass production version of the program-controlled unit with an emulation unit having a reduced functional and/or performance scope. Therefore, an emulatable mass production version of the program-controlled unit can be made available which is only insignificantly more expensive, if at all, than a non-emulatable version.

Distributed computing with load-managed active storage

Abstract: One approach to high-performance processing of massive data sets is to incorporate computation into storage systems. Previous work has shown that this active storage model is effective for a variety of problems. This paper explores opportunities to use active storage as a basis for exploiting asymmetric parallelism in applications using a streaming computation model on collections of fixed-size records. This model is the basis for much of the research in I/O-efficient algorithms, which deals with an important class of massive data problems not studied in previous work on active storage. We present an extension of a streaming computation model for an external memory toolkit to support a flexible mapping of computations to storage-based processors. Our approach enables load-managed active storage: it exposes parallelism, ordering constraints, and primitive computation units to the system, which can configure the application to balance load and make the best use of available processing power Emulation results from a sorting application demonstrate the potential of dynamic adaptation in load-managed active storage.

Interfaces for an open systems server providing tape drive emulation

Abstract: An improved interface between a host computer and a tape drive emulation system includes software interfaces for communicating control, configuration, and policy data and a hardware interface for providing redundancy and fan-out between the main controller and host channels.

Characterization of operating systems behavior in the presence of faulty drivers through software fault emulation

Abstract: This paper proposes a practical way to evaluate the behavior of commercial-off-the-shelf (COTS) operating systems in the presence of faulty device drivers. The proposed method is based on the emulation of software faults in target device drivers and the observation of the behavior of the system and of a workload regarding a comprehensive set of failure modes analyzed according to different dimensions. The emulation of software faults itself is done through the injection at machine-code level of selected mutations that represent the code produced when typical programming errors are made in the high-level language code. An important aspect of the proposed methodology is the use of simple and established practices to evaluate operating systems failure modes, thus allowing its use as a dependability benchmarking technique. The generalization of the methodology to any software system built of discrete and identifiable components is also discussed.

Emulation interface system

Abstract: An integrated circuit with multiple circuit cores each of which have integrated emulated circuits, and an emulation interface module, such that the integrated circuit has an on-chip debugging system. As cores other than a processor core have integrated emulation circuits, debugging of programs and operations of systems-on-a-chip becomes viable.

Method and system for efficient emulation of multiprocessor memory consistency

Abstract: A method (and system) of emulation in a multiprocessor system, includes performing an emulation in which a host multiprocessing system of the multiprocessor system supports a weak consistency model, and the target multiprocessing system of the multiprocessor system supports a strong consistency model.

RAMON: rapid-mobility network emulator

Abstract: In wireless networks, as in many areas of engineering, simulation has been the de facto standard for testing, dimensioning and analyzing mobile protocols. Emulation, which presents a lower cost, more accurate, yet more complex engineering alternative to simulation, has not been widely used in mobile computing studies. RAMON is a software/hardware emulator tailored to mimic the realistic characteristics of wireless networks. RAMON is especially designed to study how mobile protocols cope with high vehicular speeds. The main advantage of RAMON is the rapid, cost-effective and accurate testing it provides. This ranges from proper identification of protocol bottlenecks, to testing of newly available wireless networks and hardware and software devices.

Multi-core controller

Abstract: Embodiments of the present invention include a multi-core controller for use with an emulator to enable devices on a multiple device JTAG scan chain to be individually controlled for emulation/debugging operations. Non-JTAG instructions may be used in combination with JTAG compliant instructions to control individual devices in the JTAG scan chain.

Platform III: A new version for the integrated test system for AC machine drives performance analysis

Abstract: This work presents the third version of the "Plataforma" integrated test system, a test rig for experiments required to validate dynamically different types of new strategies and control schemes based on vector control theories, parametric estimation, and neural networks applied to AC machine drives; and to analyze the effect of these control strategies over the mains quality. The equipment includes the AC driver power stages, the mechanical load emulation stage, the instrumentation stage and the signal processing and control stage. Two main improvements have been performed: (1) an improved instrumentation stage; (2) a dynamic load system implemented with a torque controlled DC motor. Due to its high versatility, this test system can be used both in research laboratories and postgraduate courses.

Diagnosis of open defects in FPGA interconnect

Abstract: In this paper, we present coarse-grain and fine-grain diagnosis techniques to identify a faulty element in FPGA interconnects. The fault model we use is stuck-open and resistive-open for interconnects. The presented technique requires only a small number of configurations while offering high resolution diagnosis. We implemented this technique on real FPGA chips and verified it using fault emulation.

CAN emulation in a time-triggered environment

Abstract: The controller area network (CAN) protocol is a widely used event-triggered communication protocol, which offers high average performance, flexibility and extensibility. However, time-triggered protocols are becoming more and more accepted as the communication infrastructure for safety-critical applications, since they support composability, dependability and a deterministic behavior of all message transmissions. The desire to reuse CAN based legacy applications as part of time-triggered systems motivates the provision of CAN communication services within a time-triggered environment. This paper elaborates on an approach of layering CAN on time-triggered communication services. A node that participates in this CAN emulation reserves a part of its sending slot for implementing a packet service, thereby establishing a communication channel, a way of transferring a sequential data stream of CAN messages. Furthermore, the emulation offers an improved CAN communication service by addressing deficiencies of the basic CAN protocol. The CAN emulation exploits the fault-tolerance mechanisms of the underlying time-triggered system for extending CAN with support for dependable systems.

An immunochip architecture and its emulation

Abstract: The paper proposes an architecture for building immunochips and provides a mathematical framework in describing some of its operations using the concepts of proteins and immune networks. This approach is considered as the computational basis of an "immunochip", and this paper describes its implementation procedure. The proposed immunochip is emulated in software and evaluated with the problem of detecting of dangerous ballistic situations in near-Earth space.

Little offset in multicycle event maintaining cycle accurate tracing of stop events

Abstract: A method of tracing activity of a data processor includes collecting and transmitting trace data. An epause marker is embedded in the trace stream upon detection of an emulation halt. This epause marker includes a little offset indicating a number of latency instructions within trace collection hardware since a program counter exception. This permits the utilization emulation device to annulling trace data corresponding to the latency instructions.

Method and apparatus for non-obtrusive power profiling

Abstract: Systems and methods for improved power profiling of embedded applications are presented. These inventions provide the ability to unobtrusively measure the power consumption of an embedded application as the application is executing on its target hardware. The unobtrusiveness is achieved by using programmable emulation circuitry in the target system processor and available device debug terminals on the test port.