Showing papers on "Linear amplifier published in 2022"

Envelope Tracking Supply Modulator with Trellis-Search-Based Switching and 160-MHz Capability

Abstract: The hybrid amplifier that combines a buck converter and a linear amplifier has been widely used as the envelope tracking (ET) supply modulator for ET power amplifier (PA) application. Instead of adding more large off-chip passives to raise the efficiency of the hybrid amplifier, this work uses a Viterbi-like trellis search (TS) digital signal processing (DSP) algorithm to find the optimal switching sequence for the buck converter in the hybrid amplifier, lowering RMS error current in the op-amp, and minimizing switching. For 20-MHz channels, it lowers op-amp current by 27%. The chip also supports 160-MHz channels without TS. With 802.11ax modulation, it raises total efficiency of a 2.5-GHz PA by 7.2% at 22.3 dBm, with EVM of −32.7 dB.

Mitigation of Load Mismatch Effects Using an Orthogonal Load Modulated Balanced Amplifier

Abstract: This article presents an orthogonal load-modulated balanced amplifier designed to mitigate the effects of the load mismatch on the power-added efficiency and output power of the amplifier. This is achieved by electronically adjusting the ratio between the two input signals of the power amplifier (PA) (in phase and amplitude) and the reactive termination at the output nominally isolated port. The mode of operation of the PA is described using a theoretical analysis that highlights the role of the different tuning parameters and is confirmed by simulations using a simplified transistor model. The design and characterization under load mismatch of a prototype PA, working in the 1.6–3.2 GHz band are described and the experimental results compared to those of an analogous balanced PA, where it is shown that the orthogonal balanced amplifier is able to increase substantially the mismatch region on which a given target performance is achieved.

Modular Design and Characterization of a Reconfigurable Sequential Power Amplifier

Abstract: This paper demonstrates a modular design approach for a sequential power amplifier (SPA) with reconfigurable output power back-off (OPBO) characteristics. The proposed dual-input SPA consists of a main amplifier (10W), a peaking amplifier (25W), and a 6.5 dB coupler. This SPA is implemented by using two off-the-shelf PAs both with overlapping bandwidths between 3.3 and 3.7 GHz. When combined together the SPA presents the same operational bandwidth but with additional enhanced backoff efficiency. This SPA achieves a peak drain efficiency of 51% at 9 dB back-off, and 36% at maximum output power at 3.5 GHz while maintaining the same bandwidth of the two constituent PAs. The resulting SPA performance is competitive with other state-of-art Doherty PAs and SPAs.

A 50 W CW 1–6 GHz GaN MMIC Power Amplifier Module with Greater than 30 % Power Added Efficiency

Abstract: This paper presents the design and measurement of a 1 – 6 GHz GaN MMIC power amplifier module. The MMIC PAs and power combiner are fabricated on 100µm silicon carbide using Qorvo's QGaN25 released process. A two-stage non-uniform distributed power amplifier with an output transformer is implemented as the core amplifier to achieve excellent power, PAE and bandwidth. Two core amplifiers are combined in parallel within the package module using a separately realized power combiner die, which is also used as the input splitter. The integrated power amplifier package module produces 42.7 – 60.3 W of CW output power over the 1 – 6 GHz band with 30.4 - 42.9 % PAE and 23.3 – 24.8 dB gain using a 32 V supply voltage all within a 15.24 mm × 15.24 mm footprint.

Class-C Pulsed Power Amplifier with Voltage Divider Integrated with High-Voltage Transistor and Switching Diodes for Handheld Ultrasound Instruments

Abstract: A novel Class-C pulsed power amplifier with a voltage divider integrated with a high-voltage transistor and switching diodes is proposed to reduce DC power consumption and increase the maximum output power for handheld ultrasound instruments. Ultrasonic transducers in ultrasound instruments are devices that convert electrical power into acoustic power or vice versa, which are triggered by power amplifiers. Efficient power conversion is also very important to avoid thermal issues in handheld ultrasound instruments owing to limited battery power and excessive heat generation caused by the enclosed structures of the handheld ultrasound instruments. Consequently, higher output power and lower DC power consumption are desirable for a power amplifier. Therefore, a circuit to control power amplifiers was developed. The measured output power (94.66 W) and DC power consumption (2.12 W) when using the proposed circuit are better than those when using the existing Class-C pulsed power amplifier (74.90 W and 2.77 W, respectively). In the pulse-echo measurement mode, the echo amplitude (12.34 mVp-p) and bandwidth (27.74%) of the proposed Class-C pulsed power amplifier were superior to those of the existing Class-C pulsed power amplifier (4.38 mVp-p and 23.25%, respectively). Therefore, the proposed structure can improve the performance of handheld ultrasound instruments.

The Class D Audio Power Amplifier: A Review

Abstract: Class D power amplifiers, one of the most critical devices for application in sound systems, face severe challenges due to the increasing requirement of smartphones, digital television, digital sound, and other terminals. The audio power amplifier has developed from a transistor amplifier to a field-effect tube amplifier, and digital amplifiers have made significant progress in circuit technology, components, and ideological understanding. The stumbling blocks for a successful power amplifier are low power efficiency and a high distortion rate. Therefore, Class D audio amplifiers are becoming necessary for smartphones and terminals due to their power efficiency. However, the switching nature and intrinsic worst linearity of Class D amplifiers compared to linear amplifiers make it hard to dominate the market for high-quality speakers. The breakthrough arrived with the GaN device, which is appropriate for fast-switching and high-power-density power electronics switching elements compared with traditional Si devices, thus, reducing power electronic systems’ weight, power consumption, and cost. GaN devices allow Class D audio amplifiers to have high fidelity and efficiency. This paper analyzes and discusses the topological structure and characteristics and makes a judgment that Class D amplifiers based on GaN amplifiers are the future development direction of audio amplifiers.

Design and Analysis of Low Power High Gain Amplifiers for DAC Application

Abstract: Amplifier is an electronic circuit which amplifies the input signal strength or amplitude. The main concern in designing amplifier is the gain and power dissipation so to review this, the amplifiers compared in this paper include common source amplifier, differential amplifier, operational amplifier with different loads such as resistive load, active load and current mirror. These amplifiers were designed and simulated using mentor graphics tool in 130nm technology. It was found that Differential amplifier with active load using current mirror was having lower power dissipation of 0.376 nW and operational amplifier having the highest gain of 159.42. As OPAMPS’s are having the highest gain (44dB) of all three amplifiers and also when compared with previous works it was used for designing application DAC (digital to analog converter).

Comparative Analysis Among Different Types of Power Amplifier for Active Magnetic Bearing System

Abstract: In this paper, one of the major components of an active magnetic bearing system i.e., power amplifier is simulated and its output is studied. Three different type of power amplifier is designed and their time domain-based output response is observed. Power amplifier is an dc-dc type converter. Hence a dc voltage is given as input to the different models of power amplifier and the corresponding waveforms are analyzed. Further a Pulse width modulation (PWM) based asymmetrical type power amplifier is designed in PSIM and its advantage over other power amplifiers has been discussed.

A Ka Band Power Amplifier with Varactor-Based Analog Predistortion in pMOS-SOI

Abstract: To maximize efficiency while meeting stringent EVM requirements for 5G systems, it is desirable to predistort input signals to CMOS power amplifiers. Particularly near the maximum output power, PAs typically display soft saturation and significant phase variation. In this work, input power dependent bias networks in conjunction with on-chip adaptive varactor input tuning are used to compensate AM-AM and AM-PM distortions, and allow extension of the linear operation of a 28GHz pMOS-SOI amplifier to higher output power and efficiency. Varactors are demonstrated with Q in the range 10–30 at 30 GHz in 45nm CMOS-SOI technology and are applied in series with the P A input. A 2-stack pMOS PAis demonstrated meeting 5.5% EVM requirements for an 800MHz OFDM signal with 11.4 dBm average output power and 18% P AE. These results correspond to approximately 1–2 dB extension of the linear operation power regime of the amplifier.

Low-Power Ka- and V-Band Miller Compensated Amplifiers in 130-nm SiGe BiCMOS Technology

Abstract: This paper presents the design of two low-power differential amplifiers at 30 GHz and 60 GHz in a 130-nm SiGe BiCMOS technology. The amplifiers use cross-connected compensation transistors in a common–emitter configuration to improve the gain-bandwidth product. This technique also provides unconditional stability which is ensured by analyzing the core circuit at the process corners for various operation temperatures. The design procedure is verified by experimental results which show that the 30 GHz amplifier consumes 5.3 mW and has a peak small-signal gain of 14.9 dB, while the 60 GHz amplifier consumes 12 mW with a peak small-signal gain of 12.5 dB. In addition, 6 dBm output power is measured from the 30 GHz amplifier at 1 dB compression and more than 10 dBm output power is expected from the 60 GHz amplifier. The low power consumption, high gain, and high linearity of the proposed amplifier blocks show that the described approach is promising for low-power and high-efficiency millimeter-wave RF frontends.

Phase Compensated Sequential Load Modulated Balanced Amplifier Using Harmonically Tuned Control Amplifier

Abstract: This paper presents a new solution for phase compensation in the sequential load modulated balanced amplifier (SLMBA). It is illustrated that, by using proper harmonic tuning in the control amplifier branch, the load trajectory of the balanced amplifier can be made close to the real axis, which is beneficial to recover peak power and efficiency at both back-off and saturation of the SLMBA in wideband operation. To validate the idea, a wideband prototype operating from 1.9 to 2.6 GHz was designed. Measured drain efficiency of 61.0% to 66.5% at peak power and 53.2% to 64.1% at 8-dB back-off are achieved. When driven with a 60-MHz long-term evolution signal with an 8-dB peak-to average power ratio, the proposed SLMBA achieves over 52% average drain efficiency, and better than −45-dBc adjacent channel power ratio with digital predistortion.

An Enhanced Ultra-Wideband Single Phase Hybrid Supply Envelope Tracking Modulator for Modern Wireless Communications

Abstract: This paper presents a Single Phase Hybrid Supply Envelope tracking Modulator (HSEM) for RF-Power Amplifiers (RF-PAs) used in modern wireless communication systems such as 5G and 6G applications. The proposed HSEM consists of an ultra-wideband linear amplifier to track the input signals with several Mega Hertz of bandwidth, a switching amplifier to provide a high-efficiency supply voltage for the main power amplifier, and a new sensing circuit to generate the required voltage for the switching amplifier. The designed HSEM uses a two-stage rail-to-rail linear class-AB amplifier with constant Gm, high gain bandwidth (GBW), high slew rate (SR), and good phase margin (PM). Most conventional modulators use a sensing resistor or a resistor structure that increases the output ripple and the power loss. The proposed structure uses a linear amplifier output stage sensing circuit and a hysteresis low power current comparator without any resistors, external capacitors, filters, or multi-phase modulator structures. Additionally, using a current comparator eliminates the need for an external reference voltage or a current-to-voltage converter. The proposed structure does not need to remove the switching ripple through the linear amplifier, leading to a more relaxed linear amplifier design. A comprehensive analysis and guide on how to optimally select the inductor values, and the mathematical equation for the switching frequency of the hybrid modulator is given. The efficiency of the proposed structure is 84.3 %, and the maximum output power is 27.3dBm. The average output ripple is 4.16 mV in the wide range of the input voltages, and its minimum is 0.4 mV. In addition, the new structure can track a signal with 400 MHz bandwidth with FOM of the HSEM about 18. The proposed modulator is suitable for broadband and emerging telecommunications applications such as 5G and 6G, and as a power supply for RF power amplifiers. The proposed HSEM is evaluated with TSMC 180 nm CMOS technology parameters.

Technique for Studying Mobile Communications Systems Signal Power Amplifier Efficiency

Abstract: For memoryless resonant power amplifier, a technique has been developed and a study of potential indicators of its efficiency in amplifying a signal described as band-pass noise with an amplitude envelope distributed according to Rayleigh's law has been carried out. The considered signal model is typical for group signals of mobile communication systems. The developed technique is based on a more detailed piecewise linear approximation of the static characteristics of the power amplifier than usual, consideration of the normalized input signal level at which its nonlinear distortions begin, and also the introduction of the concept of the nominal cutoff angle associated with this voltage. Based on the developed idealized model of a nonlinear power amplifier, an estimate of the potential average amplification efficiency of a typical complex composite signal characteristic of mobile communication systems was obtained. It is shown that the maximum possible value of the power amplifier efficiency in the ideal case cannot exceed (13-15)%.The presented approach can be used to estimate the potentially achievable average efficiency of signal amplification with any given function of the probability density of the values of its amplitude envelope.

Design of Class F Power Amplifier for 433 MHz

Abstract: The proposed work focuses on the design of a class F power amplifier for 433 MHz which can be used for RFID applications. Power amplifier requires high efficiency and low power dissipation, especially in wireless base stations. In this work, class F amplifier is employed to achieve high efficiency by wave shaping the drain terminal waveforms with suitable harmonic termination networks. At the drain terminal, the voltage and current waveform is shaped into square and half sinusoidal waveforms by employing a harmonics control circuit. The designed class F power amplifier using Advanced Design Software (ADS) simulator has yielded the output power of 44.5 dBm in harmonic balancing for the given input power of 30 dBm at the fundamental frequency with the gain of 14.5 dBm. It was evident from the work that the added harmonic control circuit has suppressed all other harmonics except the third harmonic frequency.

Research on High-power Wide Frequency Range Pre-Amplifier

Abstract: The pre-amplifier is widely used in SAR system, which is used to achieve lower-power and fast comparators. With the development of satellite technology, high-power SAR satellites show broad application prospects in the future. The lower-power pre-amplifiers are difficult to meet the requirement of high-power SAR satellites. The digital power pre-amplifier is designed that achieve a high efficiency across the entire universal input frequency range for SAR satellites application. The H bridge cascaded multilevel inverter is selected as the topology to achieve high-power pre-amplifier application. Based on the theoretical research, the hardware of H bridge cascaded five-level inverter control by DSP and FPGA is designed. The experiments results verify the prototype design is rational and feasible.

Design and Investigation of Broadband High-Efficiency Continuous Inverse Class - F Power Amplifier

Abstract: This paper presents the design and experimental results for a broadband highly efficient power amplifier. The power amplifier (PA) was implemented by extending the continuous inverse Class-F mode through the use of resistive-reactive harmonic terminations. The desired load and source impedances were achieved through the design of hybrid stepped-impedance matching networks. Measurement results show that the designed power amplifier achieves 74 - 90% efficiency and an output power of 43.2 - 46.5dBm over the frequency band of 1.5 - 2.7 GHz. Investigation into harmonic suppression showed harmonic levels lower than -18dBc over the band. A two-tone inter-modulation test was performed, resulting in IM3 levels of better than -17dBc. The PA was tested using a 1.8GHz 1Msps 16-QAM excitation for an average output power of 39.6dBm, where the power amplifier exhibited an average efficiency of 56%.

A 5.8 GHz 10 dBm Linear CMOS Power Amplifier with Reconfigurable Load Pull Network for DSRC

Abstract: <p>In this paper, a novel reconfigurable 5.8 GHz linear power amplifier with a digital pulse-shaping filter (PSF) to improve the spurious is presented for dedicated short-range communication (DSRC) transceivers. An on-chip reconfigurable load transfer network (LTN) is able to match the output load variations to PA while keeping output return loss blow -10 dB. Furthermore, LTN improves the stability by varying quality factor of LTN for different operation conditions. The power amplifier consists of a Class-AB driver stage and a cascode topology for the PA core. To improve the spurious of the PA and controlling modulation index a gaussian-based digital pulseshaping filter is implemented which has achieved an occupied bandwidth (OCB) of less than 2 MHz. Realized in a 0.13-m CMOS technology with an area of 1.1 mm2, the power amplifier achieves 10 dBm and 25 dB output power and dynamic range, respectively. PA dissipates 76 mA from 3-V supply voltage.</p>

High linear low voltage CMOS power amplifier for 2.4 GHz applications

Abstract: ABSTRACT Wireless technology is a growing technology in which lot of attention move towards 2.4 GHz frequency applications. In transceiver front end, power amplifier is an important block of a transmitter. A low voltage power amplifier is proposed using 0.13 µm TSMC CMOS process. In this proposed work, single-ended two stage class AB power amplifier is designed and RF distortion technique is applied to improve linearity. The high linearity low voltage power amplifier is designed and simulated using ADS simulator. The optimised power amplifier produces 18 dB gain, 21.6% PAE, 21.7 dBm of OIP3 and 5.86 mA current consumption at 0.8 V supply voltage.

A 3.5GHz Power Amplifier Design

Abstract: Power amplifier is necessary component in wireless communications. Power amplifier (PA) being an important element of the transmitter, greatly affects both efficiency and linearity. Different active devices can be used in power amplifier architecture. In this paper a 3.5 GHz power amplifier has been designed using Cree CGH40010F. The amplifier provided a Power Added Efficiency of 57.5128 %, with a gain of 11.283dB and output power of 39.283dBm.

A Three Stage Ku-Band GaN HEMT Power Amplifier

Abstract: This paper describes the design of a Ku band power amplifier using GaN HEMTs. To obtain high efficiency, matching networks are incorporated into power amplifier. In order to design matching networks, the optimum source and load impedances are determined by the load pull analysis. As from single and two stage Ku band PAs do not provide the required gain for our requirement, a three stage Ku band PA is designed. At 13.63 GHz, the designed power amplifier provides more than 37.7dBm output power with large signal gain greater than 37dB and power added efficiency close to 40%.

Linear Algebra Elucidates Class-E Diode Rectifiers [Educator’s Corner]

Abstract: In power electronics, diode rectifiers are often regarded as the counterpart of a power amplifier. That is plausible because a power amplifier converts dc energy into RF, and a rectifier works in the reverse. In fact, wireless power transfer systems employ a power amplifier for transmission and a diode rectifier for reception. Therefore, the design theory of rectifiers is supposed to be analogous to that of power amplifiers. Is it straightforward to adapt the amplifier theory for rectifiers?

A 5.8GHz 41%-PAE Linear CMOS Power Amplifier Using Transcunductance Linearization Technique for WAVE Applications

Abstract: <p>In this paper, a 5.8 GHz linear power amplifier (PA) in a 130 nm CMOS process using transconductance linearization technique is presented. The power stage consists of a main amplifier with Class-F load impedance and two auxiliary amplifiers which are biased for weak Class-AB. The proposed configuration increases both the linearity of the PA at high output power levels and the efficiency at back-off powers. The AM-AM and AM-PM nonlinearities of the auxiliary amplifiers cancel the same nonlinearities of the main amplifier at higher output powers. A bypass network is introduced to prevent a positive feedback and common-mode oscillations through the supply path. The PA shows a saturated output power of 23 dBm with 41% PAE and 17dB small-signal gain. Dynamic supply voltage allows a low-power operation with improved efficiency for back-off input powers. For supply voltages of 1.8V, 2.2V, and 3.3V the linear output power and PAE are 12.67dBm, 16.77dBm, and 18.1dBm and 11%, 19.27%, and 20.44%.</p>

Removing Power Amplifier Distortions at the Receiver using Deep Learning

Abstract: In this paper, the novel idea of removing power amplifier distortions at the receiver using deep learning is proposed. First, a neural network is trained by using the data from the input and output of the power amplifier to mimic the behavior of the power amplifier. Once the model is trained, its parameters are frozen and it is then cascaded with another neural network for the power amplifier distortion removal. The entire block is then trained where the target vector of the training is the perfect signal that should be produced by the real power amplifier. Once the training has been completed, the second part of the neural network is separated and used for removing the power amplifier distortions. Simulation results are performed using an orthogonal frequency division multiplexing (OFDM) system to validate the proposed idea. AM/AM, AM/PM characteristics and constellation diagrams are presented to show that the proposed deep learning method is capable of removing the distortions that are caused by the power amplifier at the transmitter.

Improved Direct-Coupled High-Bandwidth Voltage Amplifier for B-H Characterization of Magnetic Materials

Abstract: B-H characteristics of magnetic materials are an essential input to the design of electrical machines and magnetics in power converters. Wide frequency range operation of machines and converters increasingly requires experimental characterization of the magnetic core material at low as well as high frequencies. Therefore, power amplifiers having wide bandwidth, high voltage and current gains, along with low output offset are needed for characterization. Linear closed-loop multistage amplifiers are often used. Direct coupling of amplifier stages is desirable to characterize the magnetic materials at very low frequencies. The middle stage of such linear multi-stage amplifiers provides the voltage gain. A conventional common-emitter based middle voltage gain stage is reviewed first. A folded cascode amplifier with buffered output is proposed as an alternative. This is capable of direct-coupling with the input (differential), and output (current amplification) stages. The proposed amplifier is shown experimentally to yield a high gain-bandwidth product. Experimental results of the proposed voltage amplifier and the closed loop power amplifier are presented.

Design of 2.3~3.7GHz Broadband Hybrid Continuous Class F Power Amplifier

Abstract: In this paper, on the basis of class F power amplifier, a hybrid continuous class F power amplifier theory is given for the problem of too narrow operating bandwidth of class F power amplifier. The impedance solution space based on this theory is more extensive compared to class F power amplifiers, and the bandwidth is greatly extended at the expense of certain efficiency. According to the theory, a hybrid continuous class F power amplifier with an operating frequency of 2.3~3.7GHz and a relative bandwidth of 46.7% has been designed, and the actual test results show that the range of power added efficiency is 62% ~ 80%, the gain is 11~13dB, and the maximum output power is more than 10W, which has good practical engineering application value.

Medium Power Class-E Amplifier Design

Abstract: AbstractSwitch-mode amplifiers like class-E and class-F have high efficiency and more application in RF system. The high efficiency amplifiers are normally used in the last stage of the power amplifier, but along with more and more critical DC power requirement, driving stage (medium output power) of the power amplifier also requires high efficiency. Based on the class-E amplifier operation and design principle, a 2 GHz medium output power class-E amplifier was designed and manufactured. The test results show agreement with simulation and the amplifier has peak PAE of 78%.KeywordsClass-E amplifierPower Added Efficiency (PAE)Medium power amplifier

Design and Implementation of 100W GaN HEMT Power Amplifier in UHF band

Abstract: This paper presents design and implementation of a power amplifier using packaged GaN HEMT (High electron mobility transistor) device and delivering an output power of 100W at 1-dB compression in UHF (400–450 MHz) band. To drive this 100W power amplifier, a driver amplifier delivering 10 W linear output power has also been designed. Both the amplifiers have been designed and integrated in the total chain delivering an output power of 1KW.

Broadband Performance of a 6W Pushpull Power Amplifier on the VHF-UHF Band

Abstract: In this paper, a broadband 100-700 MHz power amplifier was designed. The results of simulation are compared with the measurements,The shunt feedback of power amplifier module provides the linear and broadband frequency amplification. The push-pull topology with ferrite balun provides enhanced efficiency and high power generation along In this work a commercially available LDMOS transistor (D2003UK) is used, The amplifier can deliver 6W to a 50 ohm load and has 14dB gain.Broadband high power amplifiers are considered as key components in next generation software defined radio communication systems. In principle, application of a linear, highly efficient wide band amplifier can replace several narrow band power amplifiers, yielding reduced costs and form factor, This paper uses D2003UK a transistor to achieve a 6 Watt amplifier for broad band .